Design of a fast multi-reference frame integer motion estimator for H.264/AVC

Juwon Byun, Jaeseok Kim

Research output: Contribution to journalArticle

Abstract

This paper presents a fast multi-reference frame integer motion estimator for H.264/AVC. The proposed system uses the previously proposed fast multi-reference frame algorithm. The previously proposed algorithm executes a full search area motion estimation in reference frames 0 and 1. After that, the search areas of motion estimation in reference frames 2, 3 and 4 are minimized by a linear relationship between the motion vector and the distances from the current frame to the reference frames. For hardware implementation, the modified algorithm optimizes the search area, reduces the overlapping search area and modifies a division equation. Because the search area is reduced, the amount of computation is reduced by 58.7%. In experimental results, the modified algorithm shows an increase of bit-rate in 0.36% when compared with the five reference frame standard. The pipeline structure and the memory controller are also adopted for real-time video encoding. The proposed system is implemented using 0.13 um CMOS technology, and the gate count is 1089K with 6.50 KB of internal SRAM. It can encode a Full HD video (1920×1080P@30Hz) in real-time at a 135 MHz clock speed with 5 reference frames.

Original languageEnglish
Pages (from-to)430-442
Number of pages13
JournalJournal of Semiconductor Technology and Science
Volume13
Issue number5
DOIs
Publication statusPublished - 2013 Oct 1

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Motion estimation
Static random access storage
Clocks
Pipelines
Hardware
Data storage equipment
Controllers

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

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title = "Design of a fast multi-reference frame integer motion estimator for H.264/AVC",
abstract = "This paper presents a fast multi-reference frame integer motion estimator for H.264/AVC. The proposed system uses the previously proposed fast multi-reference frame algorithm. The previously proposed algorithm executes a full search area motion estimation in reference frames 0 and 1. After that, the search areas of motion estimation in reference frames 2, 3 and 4 are minimized by a linear relationship between the motion vector and the distances from the current frame to the reference frames. For hardware implementation, the modified algorithm optimizes the search area, reduces the overlapping search area and modifies a division equation. Because the search area is reduced, the amount of computation is reduced by 58.7{\%}. In experimental results, the modified algorithm shows an increase of bit-rate in 0.36{\%} when compared with the five reference frame standard. The pipeline structure and the memory controller are also adopted for real-time video encoding. The proposed system is implemented using 0.13 um CMOS technology, and the gate count is 1089K with 6.50 KB of internal SRAM. It can encode a Full HD video (1920×1080P@30Hz) in real-time at a 135 MHz clock speed with 5 reference frames.",
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Design of a fast multi-reference frame integer motion estimator for H.264/AVC. / Byun, Juwon; Kim, Jaeseok.

In: Journal of Semiconductor Technology and Science, Vol. 13, No. 5, 01.10.2013, p. 430-442.

Research output: Contribution to journalArticle

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