Dual gate ZnO-based thin-film transistors operating at 5 V: Nor gate application

C. H. Park, Kwang H. Lee, Min Suk Oh, Kimoon Lee, Seongil Im, Byoung H. Lee, Myung M. Sung

Research output: Contribution to journalArticlepeer-review

24 Citations (Scopus)

Abstract

We report on the fabrication of ZnO-based dual gate (DG) thin-film transistors (TFTs) with 20-nm-thick AI2O3 for both top and bottom dielectrics, which were deposited by atomic layer deposition on glass substrates at 200 °C. As characterized with single gate (SG), DG, and ground plane (GP) modes, our ZnO TFTs are well operated under 5 V. DG-mode TFT showed a field mobility of 0.38 cm2/V · s, a high saturation current of 6 μA, and an on/off current ratio of ∼106, while SG- and GP-mode TFTs showed a similar value of mobility but with lower current. Using DG and GP modes, nor gate operation was well demonstrated.

Original languageEnglish
Pages (from-to)30-32
Number of pages3
JournalIEEE Electron Device Letters
Volume30
Issue number1
DOIs
Publication statusPublished - 2009

Bibliographical note

Funding Information:
Manuscript received September 25, 2008. Current version published December 24, 2008. This work was supported in part by the Fundamental R&D Program for Core Technology of Materials funded by the Ministry of Commerce, Industry and Energy, by the IT R&D program of MKE/IITA [2006-S079-02, Smart window with transparent electronic devices], and by the Brain Korea 21 Program. The review of this letter was arranged by Editor A. Nathan.

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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