Dynamic mixed serial-parallel content addressable memory (DMSP CAM)

Mingu Kang, Jisu Kim, Young Hwi Yang, Seong Ook Jung

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

A novel dynamic mixed serial-parallel content addressable memory (DMSP CAM) is proposed to achieve both low-power consumption and high performance. The replica circuits provide optimal timings to enable and disable the matchline charge transistor, which maximizes performance and minimizes leakage current, respectively. The DMSP CAM does not suffer from charge sharing in the serial stage and achieves high performance by removing the predischarge or precharge operation of the matchline before every comparison. To guarantee the robustness of the proposed scheme, a statistical design methodology is also applied. Using the 45-nm technology, the DMSP CAM achieves both energy saving and performance improvement, and thus over 53% energy-delay product reduction compared with the other serial-parallel mixed CAMs.

Original languageEnglish
Pages (from-to)721-731
Number of pages11
JournalInternational Journal of Circuit Theory and Applications
Volume41
Issue number7
DOIs
Publication statusPublished - 2013 Jul 1

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Associative storage
High Performance
Charge
Computer aided manufacturing
Leakage currents
Leakage Current
Energy conservation
Transistors
Electric power utilization
Energy Saving
Replica
Power Consumption
Design Methodology
Timing
Sharing
Networks (circuits)
Maximise
Robustness
Minimise
Energy

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Computer Science Applications
  • Electrical and Electronic Engineering
  • Applied Mathematics

Cite this

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Dynamic mixed serial-parallel content addressable memory (DMSP CAM). / Kang, Mingu; Kim, Jisu; Yang, Young Hwi; Jung, Seong Ook.

In: International Journal of Circuit Theory and Applications, Vol. 41, No. 7, 01.07.2013, p. 721-731.

Research output: Contribution to journalArticle

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