Abstract
Three-dimensional integration technology results in area savings, platform power savings, and an increase in performance. Through-silicon via (TSV) assembly and manufacturing processes can potentially introduce defects. This may result in increases in manufacturing and test costs and will cause a yield problem. To improve the yield, spare TSVs can be included to repair defective TSVs. This paper proposes a new built-in self-test feature to identify defective TSV channels. For defective TSVs, this paper also introduces dynamic self-repair architectures using code-based and hardware-mapping based repair.
| Original language | English |
|---|---|
| Pages (from-to) | 301-308 |
| Number of pages | 8 |
| Journal | ETRI Journal |
| Volume | 36 |
| Issue number | 2 |
| DOIs | |
| Publication status | Published - 2014 Apr |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Computer Science(all)
- Electrical and Electronic Engineering
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Cite this
Yang, J. S., Han, T. H., Kobla, D., & Ju, E. L. (2014). Dynamic self-repair architectures for defective through-silicon vias. ETRI Journal, 36(2), 301-308. https://doi.org/10.4218/etrij.14.0113.0578