3D NAND has a vertically stacked semiconductor structure to increase the memory density of semiconductor devices. 3D NAND devices are based on the multiply stacked silicon nitride (Si3N4) and silicon dioxide (SiO2) structure, and it is essential to high selectively etch Si3N4-to-SiO2 in the fabrication process. Hot phosphoric acid (H3PO4) has been typically used in the Si3N4-to-SiO2 selective etching process and the etch selectivity can increase by adding SiO2 etching inhibitors in H3PO4. In order to increase etching rate of Si3N4 and Si3N4-to-SiO2 etch selectivity, additives can be added in H3PO4. However, SiO2 etching inhibitors to increase Si3N4-to-SiO2 etch selectivity may occur by-product redeposition issue around the SiO2-layered trenches of Si3N4/SiO2 multi-stack structure. In this study, the etching behavior of the Si3N4/SiO2 multi-stack structures in Si02 etching inhibitor-added H3PO4 was investigated. In addition, high selective SbN4 etching with the control of redeposition was performed on the Si3N4/SiO2 multi-stack structure by adding proper SiO2 etching inhibitor in H3PO4
|Title of host publication||16th International Symposium on Semiconductor Cleaning Science and Technology, SCST 2019|
|Editors||Koichiro Saga, Paul W. Mertens, Takeshi Hattori, Jerzy Ruzyllo, Anthony J. Muscat|
|Publisher||Electrochemical Society Inc.|
|Number of pages||6|
|Publication status||Published - 2019|
|Event||16th International Symposium on Semiconductor Cleaning Science and Technology, SCST 2019 - 236th ECS Meeting - Atlanta, United States|
Duration: 2019 Oct 13 → 2019 Oct 17
|Conference||16th International Symposium on Semiconductor Cleaning Science and Technology, SCST 2019 - 236th ECS Meeting|
|Period||19/10/13 → 19/10/17|
Bibliographical noteFunding Information:
This work was supported by the Ministry of Trade, Industry & Energy (10080628) and Korea Semiconductor Research Consortium Support Program for the development of future semiconductor devices.
© The Electrochemical Society.
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