In this paper, modeling methodology of electrical characteristics for non-rectangular gate structured multifinger metal-oxide-semiconductor field-effect transistors based on minimum channel length is proposed. The test structures are fabricated and the parasitic model parameters are extracted using the measured data for the proposed model. The proposed model can support better physical explanation than the previously presented integrated length model. The proposed model can precisely explain the electrical characteristics and is supported by theoretical equations for non-rectangular gates, such as the threshold voltage, the saturation voltage, the saturation current, and the leakage current. However, the previous integrated length model cannot sufficiently explain the electrical characteristics for non-rectangular gates although it is sustained by theoretical equations. Furthermore, this paper shows the relationship between gate poly area and the electrical characteristics. As a result, the electrical characteristics are dependent on the variation of the minimum of the gate length, rather than the profile of gate length variation.
|Number of pages||7|
|Journal||IEEE Transactions on Components, Packaging and Manufacturing Technology|
|Publication status||Published - 2011|
Bibliographical noteFunding Information:
Manuscript received July 14, 2010; revised October 10, 2010; accepted November 13, 2010. Date of publication March 7, 2011; date of current version April 8, 2011. This work was supported by the Institute of Telecommunication, Multimedia, and SOC Information Technology, Yonsei University, Seoul, Korea, under the Brain Korea 21 Program. Recommended for publication by Associate Editor B. Courtois upon evaluation of reviewers’ comments.
The computer-aided design tool was supported by the Integrated Circuit Design Education Center, Daejeon, Korea.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Industrial and Manufacturing Engineering
- Electrical and Electronic Engineering