Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter

Taehui Na; Hanwool Jeong; Seong Ook Jung; Jung Pill Kim; Seung H. Kang

doi:10.1109/ICECS.2015.7440333

Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter

Taehui Na, Hanwool Jeong, Seong Ook Jung, Jung Pill Kim, Seung H. Kang

Department of Electrical and Electronic Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

2 Citations (Scopus)

Abstract

In this paper, we first analyze the efficiency of importance sampling (IS) method in spin transfer torque random access memory (STT-RAM) design with industry-compatible model parameter. Commonly used normal fitting method cannot estimate the yield accurately unless an output distribution follows the Gaussian distribution. The efficiency of IS method is significantly degraded when industry-compatible model parameters are used because most variables affected by process variation are not controllable. With industry-compatible 45-nm model parameters, Monte Carlo HSPICE simulation results show that the required number of simulations to satisfy error rate less than 5% should be greater than 50,000.

Original language	English
Title of host publication	2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	400-403
Number of pages	4
ISBN (Electronic)	9781509002467
DOIs	https://doi.org/10.1109/ICECS.2015.7440333
Publication status	Published - 2016 Mar 23
Event	IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015 - Cairo, Egypt Duration: 2015 Dec 6 → 2015 Dec 9

Publication series

Name	Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems
Volume	2016-March

Other

Other	IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015
Country/Territory	Egypt
City	Cairo
Period	15/12/6 → 15/12/9

Bibliographical note

Publisher Copyright:
© 2015 IEEE.

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

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10.1109/ICECS.2015.7440333

Cite this

Na, T., Jeong, H., Jung, S. O., Kim, J. P., & Kang, S. H. (2016). Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter. In 2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015 (pp. 400-403). [7440333] (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Vol. 2016-March). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICECS.2015.7440333

Na, Taehui ; Jeong, Hanwool ; Jung, Seong Ook et al. / Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter. 2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015. Institute of Electrical and Electronics Engineers Inc., 2016. pp. 400-403 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems).

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abstract = "In this paper, we first analyze the efficiency of importance sampling (IS) method in spin transfer torque random access memory (STT-RAM) design with industry-compatible model parameter. Commonly used normal fitting method cannot estimate the yield accurately unless an output distribution follows the Gaussian distribution. The efficiency of IS method is significantly degraded when industry-compatible model parameters are used because most variables affected by process variation are not controllable. With industry-compatible 45-nm model parameters, Monte Carlo HSPICE simulation results show that the required number of simulations to satisfy error rate less than 5% should be greater than 50,000.",

author = "Taehui Na and Hanwool Jeong and Jung, {Seong Ook} and Kim, {Jung Pill} and Kang, {Seung H.}",

note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015 ; Conference date: 06-12-2015 Through 09-12-2015",

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Na, T, Jeong, H, Jung, SO, Kim, JP & Kang, SH 2016, Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter. in 2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015., 7440333, Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems, vol. 2016-March, Institute of Electrical and Electronics Engineers Inc., pp. 400-403, IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015, Cairo, Egypt, 15/12/6. https://doi.org/10.1109/ICECS.2015.7440333

Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter. / Na, Taehui; Jeong, Hanwool; Jung, Seong Ook et al.

2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015. Institute of Electrical and Electronics Engineers Inc., 2016. p. 400-403 7440333 (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems; Vol. 2016-March).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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Na T, Jeong H, Jung SO, Kim JP, Kang SH. Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter. In 2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015. Institute of Electrical and Electronics Engineers Inc. 2016. p. 400-403. 7440333. (Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems). https://doi.org/10.1109/ICECS.2015.7440333

Efficiency analysis of importance sampling in deep submicron STT-RAM design using uncontrollable industry-compatible model parameter

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