Abstract
As SOC and complex systems usually include analogue IPs, it becomes more important to test analogue devices efficiently. The reason for this is that analogue testing for high quality requires substantial testing costs although the analogue portion in a whole chip or in a system is usually very small. In the paper, an efficient low-cost built-in self-test (BIST) scheme is developed for testing A/D converters. The key ideas are to use a triangular wave as a test input signal and to analyse the output response for functional testing. In order to perform functional testing, new fault models called successive value, oscillation and bit faults are proposed. Testing these faults guarantees the quality of A/D converters. For experimental results, a Δ-Σ A/D converter and a pipeline A/D converter are used. The results show that the new BIST scheme is very efficient in terms of fault coverage and hardware overhead.
| Original language | English |
|---|---|
| Pages (from-to) | 597-604 |
| Number of pages | 8 |
| Journal | IEE Proceedings: Circuits, Devices and Systems |
| Volume | 152 |
| Issue number | 6 |
| DOIs | |
| Publication status | Published - 2005 Dec 1 |
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All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
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Efficient BIST scheme for A/D converters. / Kim, K.; Kim, Y. J.; Shin, Y. S.; Song, D.; Kang, S.
In: IEE Proceedings: Circuits, Devices and Systems, Vol. 152, No. 6, 01.12.2005, p. 597-604.Research output: Contribution to journal › Article
TY - JOUR
T1 - Efficient BIST scheme for A/D converters
AU - Kim, K.
AU - Kim, Y. J.
AU - Shin, Y. S.
AU - Song, D.
AU - Kang, S.
PY - 2005/12/1
Y1 - 2005/12/1
N2 - As SOC and complex systems usually include analogue IPs, it becomes more important to test analogue devices efficiently. The reason for this is that analogue testing for high quality requires substantial testing costs although the analogue portion in a whole chip or in a system is usually very small. In the paper, an efficient low-cost built-in self-test (BIST) scheme is developed for testing A/D converters. The key ideas are to use a triangular wave as a test input signal and to analyse the output response for functional testing. In order to perform functional testing, new fault models called successive value, oscillation and bit faults are proposed. Testing these faults guarantees the quality of A/D converters. For experimental results, a Δ-Σ A/D converter and a pipeline A/D converter are used. The results show that the new BIST scheme is very efficient in terms of fault coverage and hardware overhead.
AB - As SOC and complex systems usually include analogue IPs, it becomes more important to test analogue devices efficiently. The reason for this is that analogue testing for high quality requires substantial testing costs although the analogue portion in a whole chip or in a system is usually very small. In the paper, an efficient low-cost built-in self-test (BIST) scheme is developed for testing A/D converters. The key ideas are to use a triangular wave as a test input signal and to analyse the output response for functional testing. In order to perform functional testing, new fault models called successive value, oscillation and bit faults are proposed. Testing these faults guarantees the quality of A/D converters. For experimental results, a Δ-Σ A/D converter and a pipeline A/D converter are used. The results show that the new BIST scheme is very efficient in terms of fault coverage and hardware overhead.
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U2 - 10.1049/ip-cds:20041171
DO - 10.1049/ip-cds:20041171
M3 - Article
AN - SCOPUS:29144511114
VL - 152
SP - 597
EP - 604
JO - IET Circuits, Devices and Systems
JF - IET Circuits, Devices and Systems
SN - 1751-858X
IS - 6
ER -