Efficient BIST scheme for A/D converters

K. Kim, Y. J. Kim, Y. S. Shin, D. Song, Sungho Kang

Research output: Contribution to journalArticle

3 Citations (Scopus)

Abstract

As SOC and complex systems usually include analogue IPs, it becomes more important to test analogue devices efficiently. The reason for this is that analogue testing for high quality requires substantial testing costs although the analogue portion in a whole chip or in a system is usually very small. In the paper, an efficient low-cost built-in self-test (BIST) scheme is developed for testing A/D converters. The key ideas are to use a triangular wave as a test input signal and to analyse the output response for functional testing. In order to perform functional testing, new fault models called successive value, oscillation and bit faults are proposed. Testing these faults guarantees the quality of A/D converters. For experimental results, a Δ-Σ A/D converter and a pipeline A/D converter are used. The results show that the new BIST scheme is very efficient in terms of fault coverage and hardware overhead.

Original languageEnglish
Pages (from-to)597-604
Number of pages8
JournalIEE Proceedings: Circuits, Devices and Systems
Volume152
Issue number6
DOIs
Publication statusPublished - 2005 Dec 1

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Built-in self test
Testing
Large scale systems
Costs
Pipelines
Hardware

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Kim, K. ; Kim, Y. J. ; Shin, Y. S. ; Song, D. ; Kang, Sungho. / Efficient BIST scheme for A/D converters. In: IEE Proceedings: Circuits, Devices and Systems. 2005 ; Vol. 152, No. 6. pp. 597-604.
@article{d03d3c56976b421aa0824ccf237a55a2,
title = "Efficient BIST scheme for A/D converters",
abstract = "As SOC and complex systems usually include analogue IPs, it becomes more important to test analogue devices efficiently. The reason for this is that analogue testing for high quality requires substantial testing costs although the analogue portion in a whole chip or in a system is usually very small. In the paper, an efficient low-cost built-in self-test (BIST) scheme is developed for testing A/D converters. The key ideas are to use a triangular wave as a test input signal and to analyse the output response for functional testing. In order to perform functional testing, new fault models called successive value, oscillation and bit faults are proposed. Testing these faults guarantees the quality of A/D converters. For experimental results, a Δ-Σ A/D converter and a pipeline A/D converter are used. The results show that the new BIST scheme is very efficient in terms of fault coverage and hardware overhead.",
author = "K. Kim and Kim, {Y. J.} and Shin, {Y. S.} and D. Song and Sungho Kang",
year = "2005",
month = "12",
day = "1",
doi = "10.1049/ip-cds:20041171",
language = "English",
volume = "152",
pages = "597--604",
journal = "IET Circuits, Devices and Systems",
issn = "1751-858X",
publisher = "Institution of Engineering and Technology",
number = "6",

}

Efficient BIST scheme for A/D converters. / Kim, K.; Kim, Y. J.; Shin, Y. S.; Song, D.; Kang, Sungho.

In: IEE Proceedings: Circuits, Devices and Systems, Vol. 152, No. 6, 01.12.2005, p. 597-604.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Efficient BIST scheme for A/D converters

AU - Kim, K.

AU - Kim, Y. J.

AU - Shin, Y. S.

AU - Song, D.

AU - Kang, Sungho

PY - 2005/12/1

Y1 - 2005/12/1

N2 - As SOC and complex systems usually include analogue IPs, it becomes more important to test analogue devices efficiently. The reason for this is that analogue testing for high quality requires substantial testing costs although the analogue portion in a whole chip or in a system is usually very small. In the paper, an efficient low-cost built-in self-test (BIST) scheme is developed for testing A/D converters. The key ideas are to use a triangular wave as a test input signal and to analyse the output response for functional testing. In order to perform functional testing, new fault models called successive value, oscillation and bit faults are proposed. Testing these faults guarantees the quality of A/D converters. For experimental results, a Δ-Σ A/D converter and a pipeline A/D converter are used. The results show that the new BIST scheme is very efficient in terms of fault coverage and hardware overhead.

AB - As SOC and complex systems usually include analogue IPs, it becomes more important to test analogue devices efficiently. The reason for this is that analogue testing for high quality requires substantial testing costs although the analogue portion in a whole chip or in a system is usually very small. In the paper, an efficient low-cost built-in self-test (BIST) scheme is developed for testing A/D converters. The key ideas are to use a triangular wave as a test input signal and to analyse the output response for functional testing. In order to perform functional testing, new fault models called successive value, oscillation and bit faults are proposed. Testing these faults guarantees the quality of A/D converters. For experimental results, a Δ-Σ A/D converter and a pipeline A/D converter are used. The results show that the new BIST scheme is very efficient in terms of fault coverage and hardware overhead.

UR - http://www.scopus.com/inward/record.url?scp=29144511114&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=29144511114&partnerID=8YFLogxK

U2 - 10.1049/ip-cds:20041171

DO - 10.1049/ip-cds:20041171

M3 - Article

AN - SCOPUS:29144511114

VL - 152

SP - 597

EP - 604

JO - IET Circuits, Devices and Systems

JF - IET Circuits, Devices and Systems

SN - 1751-858X

IS - 6

ER -