Efficient test generation algorithm for path delay faults

Myoung Gyun Kim, Sungho Kang

Research output: Contribution to journalArticle

Abstract

A new algorithm has been developed to perform efficient delay testing. The algorithm enables applications of a new implication of value using indirect implication. The results of ISCAS benchmark circuits show the effectiveness of the new algorithm.

Original languageEnglish
Pages (from-to)13-14
Number of pages2
JournalElectronics Letters
Volume36
Issue number1
DOIs
Publication statusPublished - 2000 Jan 6

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Networks (circuits)
Testing

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Kim, Myoung Gyun ; Kang, Sungho. / Efficient test generation algorithm for path delay faults. In: Electronics Letters. 2000 ; Vol. 36, No. 1. pp. 13-14.
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Efficient test generation algorithm for path delay faults. / Kim, Myoung Gyun; Kang, Sungho.

In: Electronics Letters, Vol. 36, No. 1, 06.01.2000, p. 13-14.

Research output: Contribution to journalArticle

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