Electrical transport properties in electroless-etched Si nanowire field-effect transistors

Kyeong Ju Moon; Ji Hyuk Choi; Tae Il Lee; Moon Ho Ham; Wan Joo Maeng; Inchan Hwang; Hyungjun Kim; Jae Min Myoung

doi:10.1016/j.mee.2010.04.015

Electrical transport properties in electroless-etched Si nanowire field-effect transistors

Kyeong Ju Moon, Ji Hyuk Choi, Tae Il Lee, Moon Ho Ham, Wan Joo Maeng, Inchan Hwang, Hyungjun Kim, Jae Min Myoung

Research output: Contribution to journal › Article › peer-review

16 Citations (Scopus)

Abstract

We report the electrical transport of the Si nanowires in a field-effect transistor (FET) configuration, which were synthesized from B-doped p-type Si(1 1 1) wafer by an aqueous electroless etching method based on the galvanic displacement of Si by the reduction of Ag⁺ ions on the wafer surface. The FET performance of the as-synthesized Si nanowires was investigated and compared with Ag-nanoparticles-removed Si nanowires. In addition, high-k HfO₂ gate dielectric was applied to the Si nanowires FETs, leading to the enhanced performance such as higher drain current and lower subthreshold swing.

Original language	English
Pages (from-to)	2407-2410
Number of pages	4
Journal	Microelectronic Engineering
Volume	87
Issue number	11
DOIs	https://doi.org/10.1016/j.mee.2010.04.015
Publication status	Published - 2010 Nov

Bibliographical note

Funding Information:
This work was supported by the Korea Science and Engineering Foundation (KOSEF) grant funded by the Korea government (MOST) (No. R01-2007-000-20143-0 ).

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Atomic and Molecular Physics, and Optics
Condensed Matter Physics
Surfaces, Coatings and Films
Electrical and Electronic Engineering

Access to Document

10.1016/j.mee.2010.04.015

Cite this

@article{f283bbba92b446248d31650337aa118b,

title = "Electrical transport properties in electroless-etched Si nanowire field-effect transistors",

abstract = "We report the electrical transport of the Si nanowires in a field-effect transistor (FET) configuration, which were synthesized from B-doped p-type Si(1 1 1) wafer by an aqueous electroless etching method based on the galvanic displacement of Si by the reduction of Ag+ ions on the wafer surface. The FET performance of the as-synthesized Si nanowires was investigated and compared with Ag-nanoparticles-removed Si nanowires. In addition, high-k HfO2 gate dielectric was applied to the Si nanowires FETs, leading to the enhanced performance such as higher drain current and lower subthreshold swing.",

author = "Moon, {Kyeong Ju} and Choi, {Ji Hyuk} and Lee, {Tae Il} and Ham, {Moon Ho} and Maeng, {Wan Joo} and Inchan Hwang and Hyungjun Kim and Myoung, {Jae Min}",

note = "Funding Information: This work was supported by the Korea Science and Engineering Foundation (KOSEF) grant funded by the Korea government (MOST) (No. R01-2007-000-20143-0 ).",

year = "2010",

month = nov,

doi = "10.1016/j.mee.2010.04.015",

language = "English",

volume = "87",

pages = "2407--2410",

journal = "Microelectronic Engineering",

issn = "0167-9317",

publisher = "Elsevier",

number = "11",

}

TY - JOUR

T1 - Electrical transport properties in electroless-etched Si nanowire field-effect transistors

AU - Moon, Kyeong Ju

AU - Choi, Ji Hyuk

AU - Lee, Tae Il

AU - Ham, Moon Ho

AU - Maeng, Wan Joo

AU - Hwang, Inchan

AU - Kim, Hyungjun

AU - Myoung, Jae Min

N1 - Funding Information: This work was supported by the Korea Science and Engineering Foundation (KOSEF) grant funded by the Korea government (MOST) (No. R01-2007-000-20143-0 ).

PY - 2010/11

Y1 - 2010/11

N2 - We report the electrical transport of the Si nanowires in a field-effect transistor (FET) configuration, which were synthesized from B-doped p-type Si(1 1 1) wafer by an aqueous electroless etching method based on the galvanic displacement of Si by the reduction of Ag+ ions on the wafer surface. The FET performance of the as-synthesized Si nanowires was investigated and compared with Ag-nanoparticles-removed Si nanowires. In addition, high-k HfO2 gate dielectric was applied to the Si nanowires FETs, leading to the enhanced performance such as higher drain current and lower subthreshold swing.

AB - We report the electrical transport of the Si nanowires in a field-effect transistor (FET) configuration, which were synthesized from B-doped p-type Si(1 1 1) wafer by an aqueous electroless etching method based on the galvanic displacement of Si by the reduction of Ag+ ions on the wafer surface. The FET performance of the as-synthesized Si nanowires was investigated and compared with Ag-nanoparticles-removed Si nanowires. In addition, high-k HfO2 gate dielectric was applied to the Si nanowires FETs, leading to the enhanced performance such as higher drain current and lower subthreshold swing.

UR - http://www.scopus.com/inward/record.url?scp=77955511506&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77955511506&partnerID=8YFLogxK

U2 - 10.1016/j.mee.2010.04.015

DO - 10.1016/j.mee.2010.04.015

M3 - Article

AN - SCOPUS:77955511506

SN - 0167-9317

VL - 87

SP - 2407

EP - 2410

JO - Microelectronic Engineering

JF - Microelectronic Engineering

IS - 11

ER -

Electrical transport properties in electroless-etched Si nanowire field-effect transistors

Abstract

Bibliographical note

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this