Electrostatic potential profile generator for two-dimensional semiconductor devices

Seung Cheol Han; Jonghyun Choi; Sung Min Hong

doi:10.23919/SISPAD49475.2020.9241661

Electrostatic potential profile generator for two-dimensional semiconductor devices

Seung Cheol Han, Jonghyun Choi, Sung Min Hong

Department of Artificial Intelligence

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

3 Citations (Scopus)

Abstract

As efficiency is one of the bottlenecks of device simulation, we propose to employ deep neural networks to generate two-dimensional electrostatic potential profiles for efficiency. Supervising with previously obtained simulation results for various BJT devices, we train deep neural networks to generate an electrostatic potential profile as an initial guess for a non-equilibrium condition with estimating carrier densities by the frozen field simulation. With the generated potential profiles, we significantly reduce the number of Newton iterations without loss of accuracy.

Original language	English
Title of host publication	2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	297-300
Number of pages	4
ISBN (Electronic)	9784863487635
DOIs	https://doi.org/10.23919/SISPAD49475.2020.9241661
Publication status	Published - 2020 Sep 23
Event	2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020 - Virtual, Kobe, Japan Duration: 2020 Sep 3 → 2020 Oct 6

Publication series

Name	International Conference on Simulation of Semiconductor Processes and Devices, SISPAD
Volume	2020-September

Conference

Conference	2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020
Country/Territory	Japan
City	Virtual, Kobe
Period	20/9/3 → 20/10/6

Bibliographical note

Funding Information:
ACKNOWLEDGEMENT This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (NRF-2019R1A2C1086656). This work was also supported by Institute for Information & communications Technology Promotion(IITP) grant funded by the Korea government(MSIT) (No.2019-0-01351, Development of Ultra Low-Power Mobile Deep Learning Semiconductor With Compression/Decompression of Activation/Kernel Data).

Publisher Copyright:
© 2020 The Japan Society of Applied Physics.

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering
Computer Science Applications
Modelling and Simulation

Access to Document

10.23919/SISPAD49475.2020.9241661

Cite this

Han, S. C., Choi, J., & Hong, S. M. (2020). Electrostatic potential profile generator for two-dimensional semiconductor devices. In 2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020 (pp. 297-300). [9241661] (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD; Vol. 2020-September). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/SISPAD49475.2020.9241661

Han, Seung Cheol ; Choi, Jonghyun ; Hong, Sung Min. / Electrostatic potential profile generator for two-dimensional semiconductor devices. 2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020. Institute of Electrical and Electronics Engineers Inc., 2020. pp. 297-300 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD).

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abstract = "As efficiency is one of the bottlenecks of device simulation, we propose to employ deep neural networks to generate two-dimensional electrostatic potential profiles for efficiency. Supervising with previously obtained simulation results for various BJT devices, we train deep neural networks to generate an electrostatic potential profile as an initial guess for a non-equilibrium condition with estimating carrier densities by the frozen field simulation. With the generated potential profiles, we significantly reduce the number of Newton iterations without loss of accuracy.",

author = "Han, {Seung Cheol} and Jonghyun Choi and Hong, {Sung Min}",

note = "Funding Information: ACKNOWLEDGEMENT This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (NRF-2019R1A2C1086656). This work was also supported by Institute for Information & communications Technology Promotion(IITP) grant funded by the Korea government(MSIT) (No.2019-0-01351, Development of Ultra Low-Power Mobile Deep Learning Semiconductor With Compression/Decompression of Activation/Kernel Data). Publisher Copyright: {\textcopyright} 2020 The Japan Society of Applied Physics.; 2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020 ; Conference date: 03-09-2020 Through 06-10-2020",

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doi = "10.23919/SISPAD49475.2020.9241661",

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series = "International Conference on Simulation of Semiconductor Processes and Devices, SISPAD",

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Han, SC, Choi, J & Hong, SM 2020, Electrostatic potential profile generator for two-dimensional semiconductor devices. in 2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020., 9241661, International Conference on Simulation of Semiconductor Processes and Devices, SISPAD, vol. 2020-September, Institute of Electrical and Electronics Engineers Inc., pp. 297-300, 2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020, Virtual, Kobe, Japan, 20/9/3. https://doi.org/10.23919/SISPAD49475.2020.9241661

Electrostatic potential profile generator for two-dimensional semiconductor devices. / Han, Seung Cheol; Choi, Jonghyun; Hong, Sung Min.

2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020. Institute of Electrical and Electronics Engineers Inc., 2020. p. 297-300 9241661 (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD; Vol. 2020-September).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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N1 - Funding Information: ACKNOWLEDGEMENT This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (NRF-2019R1A2C1086656). This work was also supported by Institute for Information & communications Technology Promotion(IITP) grant funded by the Korea government(MSIT) (No.2019-0-01351, Development of Ultra Low-Power Mobile Deep Learning Semiconductor With Compression/Decompression of Activation/Kernel Data). Publisher Copyright: © 2020 The Japan Society of Applied Physics.

PY - 2020/9/23

Y1 - 2020/9/23

N2 - As efficiency is one of the bottlenecks of device simulation, we propose to employ deep neural networks to generate two-dimensional electrostatic potential profiles for efficiency. Supervising with previously obtained simulation results for various BJT devices, we train deep neural networks to generate an electrostatic potential profile as an initial guess for a non-equilibrium condition with estimating carrier densities by the frozen field simulation. With the generated potential profiles, we significantly reduce the number of Newton iterations without loss of accuracy.

AB - As efficiency is one of the bottlenecks of device simulation, we propose to employ deep neural networks to generate two-dimensional electrostatic potential profiles for efficiency. Supervising with previously obtained simulation results for various BJT devices, we train deep neural networks to generate an electrostatic potential profile as an initial guess for a non-equilibrium condition with estimating carrier densities by the frozen field simulation. With the generated potential profiles, we significantly reduce the number of Newton iterations without loss of accuracy.

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BT - 2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020

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Han SC, Choi J, Hong SM. Electrostatic potential profile generator for two-dimensional semiconductor devices. In 2020 International Conference on Simulation of Semiconductor Processes and Devices, SISPAD 2020. Institute of Electrical and Electronics Engineers Inc. 2020. p. 297-300. 9241661. (International Conference on Simulation of Semiconductor Processes and Devices, SISPAD). https://doi.org/10.23919/SISPAD49475.2020.9241661

Electrostatic potential profile generator for two-dimensional semiconductor devices

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Bibliographical note

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