Enhanced Device Stability of Ionic Gating Molybdenum Disulfide Transistors

Suk Yang, Sukjin Jang, Daehwan Choi, Seok Daniel Namgung, Hyung Jun Kim, Jang Yeon Kwon

Research output: Contribution to journalArticlepeer-review

Abstract

The application of ion gels as gate dielectrics having an excellent mechanical flexibility and high capacitance to molybdenum disulfide (MoS2) devices has been extensively studied; however, some issues remain unaddressed with regard to device stability such as gate leakage current, hysteresis, and bias stress instability. This study suggests a fabrication process for the ionic gating of the MoS2 device to enhance the device stability by laminating the ion gel film onto the MoS2 transistor using a cut-and-stick method and adding a passivation layer to remove unintentional parasitic capacitances generated by the capacitive coupling effect. The ionic gating MoS2 transistor fabricated via this process operates at a low voltage (<1 V) and exhibits superior electrical characteristics such as low gate leakage currents (≈10−11 A), high on–off ratio (>106), and low hysteresis (<0.05 V). To further investigate the device stability, bias stress instability of the ionic gating MoS2 transistor is examined. The charge-trapping mechanism is the main cause of threshold voltage shifts under gate bias stress.

Original languageEnglish
Article number1900142
JournalPhysica Status Solidi - Rapid Research Letters
Volume13
Issue number9
DOIs
Publication statusPublished - 2019 Sep 1

Bibliographical note

Funding Information:
This study was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (no. 2017R1E1A1A01074087).

All Science Journal Classification (ASJC) codes

  • Materials Science(all)
  • Condensed Matter Physics

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