EOF: Efficient built-in redundancy analysis methodology with optimal repair rate

Myung Hoon Yang, Hyungjun Cho, Wooheon Kang, Sungho Kang

Research output: Contribution to journalArticle

10 Citations (Scopus)

Abstract

Faulty cell repair with redundancy can improve memory yield. In particular, built-in redundancy analysis (BIRA) is widely used to enhance the yield of embedded memories. We propose an efficient BIRA algorithm to achieve the optimal repair rate with a very short analysis time and low hardware cost. The proposed algorithm can significantly reduce the number of backtracks in the exhaustive search algorithm: it uses early termination based on the number of orthogonal faulty cells and fault classification in fault collection. Experimental results show that the proposed BIRA methodology can achieve optimal repair rate with low hardware overhead and short analysis time, as compared to previous BIRA methods.

Original languageEnglish
Article number5487466
Pages (from-to)1130-1135
Number of pages6
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Volume29
Issue number7
DOIs
Publication statusPublished - 2010 Jul 1

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Redundancy
Repair
Hardware
Data storage equipment
Costs

All Science Journal Classification (ASJC) codes

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

Cite this

@article{9afa71bd14144051819c92164776f329,
title = "EOF: Efficient built-in redundancy analysis methodology with optimal repair rate",
abstract = "Faulty cell repair with redundancy can improve memory yield. In particular, built-in redundancy analysis (BIRA) is widely used to enhance the yield of embedded memories. We propose an efficient BIRA algorithm to achieve the optimal repair rate with a very short analysis time and low hardware cost. The proposed algorithm can significantly reduce the number of backtracks in the exhaustive search algorithm: it uses early termination based on the number of orthogonal faulty cells and fault classification in fault collection. Experimental results show that the proposed BIRA methodology can achieve optimal repair rate with low hardware overhead and short analysis time, as compared to previous BIRA methods.",
author = "Yang, {Myung Hoon} and Hyungjun Cho and Wooheon Kang and Sungho Kang",
year = "2010",
month = "7",
day = "1",
doi = "10.1109/TCAD.2010.2044846",
language = "English",
volume = "29",
pages = "1130--1135",
journal = "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems",
issn = "0278-0070",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "7",

}

EOF : Efficient built-in redundancy analysis methodology with optimal repair rate. / Yang, Myung Hoon; Cho, Hyungjun; Kang, Wooheon; Kang, Sungho.

In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 29, No. 7, 5487466, 01.07.2010, p. 1130-1135.

Research output: Contribution to journalArticle

TY - JOUR

T1 - EOF

T2 - Efficient built-in redundancy analysis methodology with optimal repair rate

AU - Yang, Myung Hoon

AU - Cho, Hyungjun

AU - Kang, Wooheon

AU - Kang, Sungho

PY - 2010/7/1

Y1 - 2010/7/1

N2 - Faulty cell repair with redundancy can improve memory yield. In particular, built-in redundancy analysis (BIRA) is widely used to enhance the yield of embedded memories. We propose an efficient BIRA algorithm to achieve the optimal repair rate with a very short analysis time and low hardware cost. The proposed algorithm can significantly reduce the number of backtracks in the exhaustive search algorithm: it uses early termination based on the number of orthogonal faulty cells and fault classification in fault collection. Experimental results show that the proposed BIRA methodology can achieve optimal repair rate with low hardware overhead and short analysis time, as compared to previous BIRA methods.

AB - Faulty cell repair with redundancy can improve memory yield. In particular, built-in redundancy analysis (BIRA) is widely used to enhance the yield of embedded memories. We propose an efficient BIRA algorithm to achieve the optimal repair rate with a very short analysis time and low hardware cost. The proposed algorithm can significantly reduce the number of backtracks in the exhaustive search algorithm: it uses early termination based on the number of orthogonal faulty cells and fault classification in fault collection. Experimental results show that the proposed BIRA methodology can achieve optimal repair rate with low hardware overhead and short analysis time, as compared to previous BIRA methods.

UR - http://www.scopus.com/inward/record.url?scp=77953857283&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=77953857283&partnerID=8YFLogxK

U2 - 10.1109/TCAD.2010.2044846

DO - 10.1109/TCAD.2010.2044846

M3 - Article

AN - SCOPUS:77953857283

VL - 29

SP - 1130

EP - 1135

JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

SN - 0278-0070

IS - 7

M1 - 5487466

ER -