Polycrystalline silicon (poly-Si) films were prepared directly at a low temperature (<200°C) by using catalytic chemical vapor deposition (Cat-CVD) technique without subsequent crystallization steps. Top-gate coplanar type thin-film transistors were fabricated using the as-deposited poly-Si films. We obtained a high mobility of ∼40 cm2/(V s) and a subthreshold slope of 0.54 V/decade. Instability in threshold voltage with the drain bias could be suppressed by improving the homogeneity in the gate insulator.
|Journal||Japanese Journal of Applied Physics|
|Publication status||Published - 2007 Dec 14|
All Science Journal Classification (ASJC) codes
- Physics and Astronomy(all)