Gettering phenomenon of oxidation-induced stacking-faults in silicon-on-insulator structure by wafer-direct-bonding method

K. T. Kim, Doo Jin Choi

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

Wafer-direct-bonding method was used to find gettering phenomenon of oxidation-induced stacking faults in silicon-on-insulator (SOI) structure. Silicon wafers were thermally oxidized to fabricate the buried oxide in the wet oxygen ambient at 1100 °C. Active and handle wafers were immersed in a solution to make hydrophilic surfaces. Buried oxide layer was removed by hydrofluoric acid to observe the stacking faults at the Si/SiO2 interface of SOI structure. Optical microscope was used to observe etched pits of oxidation-induced stacking faults on the (100) Si surface. Pattern of gettered oxidation-induced stacking faults was found to be not effected by annealing time below the 800 °C annealing temperature.

Original languageEnglish
Pages (from-to)245-247
Number of pages3
JournalJournal of Materials Science Letters
Volume20
Issue number3
DOIs
Publication statusPublished - 2001 Feb 1

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Stacking faults
Silicon
Oxidation
Oxides
Annealing
Hydrofluoric Acid
Hydrofluoric acid
Silicon wafers
Microscopes
Oxygen
Temperature

All Science Journal Classification (ASJC) codes

  • Materials Science(all)

Cite this

@article{a637791c5f474298b997aafdf29efeab,
title = "Gettering phenomenon of oxidation-induced stacking-faults in silicon-on-insulator structure by wafer-direct-bonding method",
abstract = "Wafer-direct-bonding method was used to find gettering phenomenon of oxidation-induced stacking faults in silicon-on-insulator (SOI) structure. Silicon wafers were thermally oxidized to fabricate the buried oxide in the wet oxygen ambient at 1100 °C. Active and handle wafers were immersed in a solution to make hydrophilic surfaces. Buried oxide layer was removed by hydrofluoric acid to observe the stacking faults at the Si/SiO2 interface of SOI structure. Optical microscope was used to observe etched pits of oxidation-induced stacking faults on the (100) Si surface. Pattern of gettered oxidation-induced stacking faults was found to be not effected by annealing time below the 800 °C annealing temperature.",
author = "Kim, {K. T.} and Choi, {Doo Jin}",
year = "2001",
month = "2",
day = "1",
doi = "10.1023/A:1006737305313",
language = "English",
volume = "20",
pages = "245--247",
journal = "Journal of Materials Science Letters",
issn = "0261-8028",
publisher = "Chapman & Hall",
number = "3",

}

TY - JOUR

T1 - Gettering phenomenon of oxidation-induced stacking-faults in silicon-on-insulator structure by wafer-direct-bonding method

AU - Kim, K. T.

AU - Choi, Doo Jin

PY - 2001/2/1

Y1 - 2001/2/1

N2 - Wafer-direct-bonding method was used to find gettering phenomenon of oxidation-induced stacking faults in silicon-on-insulator (SOI) structure. Silicon wafers were thermally oxidized to fabricate the buried oxide in the wet oxygen ambient at 1100 °C. Active and handle wafers were immersed in a solution to make hydrophilic surfaces. Buried oxide layer was removed by hydrofluoric acid to observe the stacking faults at the Si/SiO2 interface of SOI structure. Optical microscope was used to observe etched pits of oxidation-induced stacking faults on the (100) Si surface. Pattern of gettered oxidation-induced stacking faults was found to be not effected by annealing time below the 800 °C annealing temperature.

AB - Wafer-direct-bonding method was used to find gettering phenomenon of oxidation-induced stacking faults in silicon-on-insulator (SOI) structure. Silicon wafers were thermally oxidized to fabricate the buried oxide in the wet oxygen ambient at 1100 °C. Active and handle wafers were immersed in a solution to make hydrophilic surfaces. Buried oxide layer was removed by hydrofluoric acid to observe the stacking faults at the Si/SiO2 interface of SOI structure. Optical microscope was used to observe etched pits of oxidation-induced stacking faults on the (100) Si surface. Pattern of gettered oxidation-induced stacking faults was found to be not effected by annealing time below the 800 °C annealing temperature.

UR - http://www.scopus.com/inward/record.url?scp=0035247207&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=0035247207&partnerID=8YFLogxK

U2 - 10.1023/A:1006737305313

DO - 10.1023/A:1006737305313

M3 - Article

VL - 20

SP - 245

EP - 247

JO - Journal of Materials Science Letters

JF - Journal of Materials Science Letters

SN - 0261-8028

IS - 3

ER -