High-efficiency built-in redundancy analysis (BIRA) is presented. The proposed BIRA uses three techniques to achieve a high repair rate using spare mapping registers with adjustable fault tags to reduce area overhead. Simulation results show that the proposed BIRA is a reasonable solution for embedded memories.
|Number of pages||4|
|Journal||Journal of Semiconductor Technology and Science|
|Publication status||Published - 2012 Sept|
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering