High-efficiency memory BISR with two serial RA stages using spare memories

I. Kang, W. Jeong, S. Kang

Research output: Contribution to journalArticlepeer-review

8 Citations (Scopus)

Abstract

As technology has become more advanced, the density of memory has increased greatly. This development has led to need for a high-efficiency redundancy analysis (RA) algorithm to improve yield rate. Presented is a new methodology that can achieve high-efficiency repair against faults in memory. Experimental results show that the proposed built-in self-repair (BISR) method performs well.

Original languageEnglish
Pages (from-to)515-517
Number of pages3
JournalElectronics Letters
Volume44
Issue number8
DOIs
Publication statusPublished - 2008

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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