High-MDSI: A high-level signal integrity fault test pattern generation method for interconnects

Chun Sunghoon, Kim Yongjoon, Sungho Kang

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Unacceptable loss of signal integrity may cause permanent or intermittent harm to the functionality and performance of SoCs. In this paper, considering the interconnection topology information, an abstract model and a new test pattern generation method of signal integrity problems on interconnects are proposed. In addition, previous SPICE-based pattern generation methods are too complex and time consuming to generate test patterns for signal integrity faults. To overcome this problem, we also develop a new high-level test pattern generation method by using the abstract signal integrity fault model. Experimental results show that the proposed signal integrity fault model is more exact for long interconnects than previous approaches. In addition, the proposed method is much faster than the SPICE-based pattern generation method.

Original languageEnglish
Title of host publicationProceedings of the 16th Asian Test Symposium, ATS 2007
Pages115-118
Number of pages4
DOIs
Publication statusPublished - 2007 Dec 1
Event16th Asian Test Symposium, ATS 2007 - Beijing, China
Duration: 2007 Oct 82007 Oct 11

Other

Other16th Asian Test Symposium, ATS 2007
CountryChina
CityBeijing
Period07/10/807/10/11

Fingerprint

SPICE
Topology

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

Sunghoon, C., Yongjoon, K., & Kang, S. (2007). High-MDSI: A high-level signal integrity fault test pattern generation method for interconnects. In Proceedings of the 16th Asian Test Symposium, ATS 2007 (pp. 115-118). [4387994] https://doi.org/10.1109/ATS.2007.4387994
Sunghoon, Chun ; Yongjoon, Kim ; Kang, Sungho. / High-MDSI : A high-level signal integrity fault test pattern generation method for interconnects. Proceedings of the 16th Asian Test Symposium, ATS 2007. 2007. pp. 115-118
@inproceedings{30b287a5c6ab4750a52f5435db0ed1da,
title = "High-MDSI: A high-level signal integrity fault test pattern generation method for interconnects",
abstract = "Unacceptable loss of signal integrity may cause permanent or intermittent harm to the functionality and performance of SoCs. In this paper, considering the interconnection topology information, an abstract model and a new test pattern generation method of signal integrity problems on interconnects are proposed. In addition, previous SPICE-based pattern generation methods are too complex and time consuming to generate test patterns for signal integrity faults. To overcome this problem, we also develop a new high-level test pattern generation method by using the abstract signal integrity fault model. Experimental results show that the proposed signal integrity fault model is more exact for long interconnects than previous approaches. In addition, the proposed method is much faster than the SPICE-based pattern generation method.",
author = "Chun Sunghoon and Kim Yongjoon and Sungho Kang",
year = "2007",
month = "12",
day = "1",
doi = "10.1109/ATS.2007.4387994",
language = "English",
isbn = "0769528902",
pages = "115--118",
booktitle = "Proceedings of the 16th Asian Test Symposium, ATS 2007",

}

Sunghoon, C, Yongjoon, K & Kang, S 2007, High-MDSI: A high-level signal integrity fault test pattern generation method for interconnects. in Proceedings of the 16th Asian Test Symposium, ATS 2007., 4387994, pp. 115-118, 16th Asian Test Symposium, ATS 2007, Beijing, China, 07/10/8. https://doi.org/10.1109/ATS.2007.4387994

High-MDSI : A high-level signal integrity fault test pattern generation method for interconnects. / Sunghoon, Chun; Yongjoon, Kim; Kang, Sungho.

Proceedings of the 16th Asian Test Symposium, ATS 2007. 2007. p. 115-118 4387994.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - High-MDSI

T2 - A high-level signal integrity fault test pattern generation method for interconnects

AU - Sunghoon, Chun

AU - Yongjoon, Kim

AU - Kang, Sungho

PY - 2007/12/1

Y1 - 2007/12/1

N2 - Unacceptable loss of signal integrity may cause permanent or intermittent harm to the functionality and performance of SoCs. In this paper, considering the interconnection topology information, an abstract model and a new test pattern generation method of signal integrity problems on interconnects are proposed. In addition, previous SPICE-based pattern generation methods are too complex and time consuming to generate test patterns for signal integrity faults. To overcome this problem, we also develop a new high-level test pattern generation method by using the abstract signal integrity fault model. Experimental results show that the proposed signal integrity fault model is more exact for long interconnects than previous approaches. In addition, the proposed method is much faster than the SPICE-based pattern generation method.

AB - Unacceptable loss of signal integrity may cause permanent or intermittent harm to the functionality and performance of SoCs. In this paper, considering the interconnection topology information, an abstract model and a new test pattern generation method of signal integrity problems on interconnects are proposed. In addition, previous SPICE-based pattern generation methods are too complex and time consuming to generate test patterns for signal integrity faults. To overcome this problem, we also develop a new high-level test pattern generation method by using the abstract signal integrity fault model. Experimental results show that the proposed signal integrity fault model is more exact for long interconnects than previous approaches. In addition, the proposed method is much faster than the SPICE-based pattern generation method.

UR - http://www.scopus.com/inward/record.url?scp=48049124765&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=48049124765&partnerID=8YFLogxK

U2 - 10.1109/ATS.2007.4387994

DO - 10.1109/ATS.2007.4387994

M3 - Conference contribution

AN - SCOPUS:48049124765

SN - 0769528902

SN - 9780769528908

SP - 115

EP - 118

BT - Proceedings of the 16th Asian Test Symposium, ATS 2007

ER -

Sunghoon C, Yongjoon K, Kang S. High-MDSI: A high-level signal integrity fault test pattern generation method for interconnects. In Proceedings of the 16th Asian Test Symposium, ATS 2007. 2007. p. 115-118. 4387994 https://doi.org/10.1109/ATS.2007.4387994