The emerging nonvolatile memory (NVM)-based logic in-memory (LiM) structure can reduce power consumption caused by data transfer since it integrates memory and logic units very closely. The ferroelectric field-effect transistor (FeFET) is one of the promising candidates for NVM-based LiM structure owing to its unique characteristics: Three-Terminal structure and high ION/OFF ratio. In this paper, we propose the FeFET based reconfigurable logic circuit which can provide AND/OR/XOR logic value in a single circuit. Simulation results show that it can achieve a 67% lower transistor number, 17% faster delay, and 54% less energy than STT-MTJ based reconfigurable logic circuit.
|Title of host publication||Proceedings - International SoC Design Conference 2021, ISOCC 2021|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||2|
|Publication status||Published - 2021|
|Event||18th International System-on-Chip Design Conference, ISOCC 2021 - Jeju Island, Korea, Republic of|
Duration: 2021 Oct 6 → 2021 Oct 9
|Name||Proceedings - International SoC Design Conference 2021, ISOCC 2021|
|Conference||18th International System-on-Chip Design Conference, ISOCC 2021|
|Country/Territory||Korea, Republic of|
|Period||21/10/6 → 21/10/9|
Bibliographical noteFunding Information:
This work was supported by Grant Nos. NRF-2019M3F3A1A02071969 and NRF-2019M3F3A1A02071966.
ACKNOWLEDGMENT Tool was supported by the IC Design Education
© 2021 IEEE.
All Science Journal Classification (ASJC) codes
- Computer Networks and Communications
- Information Systems
- Hardware and Architecture
- Electrical and Electronic Engineering