Abstract
Electroplated solenoid-type integrated inductors (SI2s) have been demonstrated to have high performance and small area occupation for GHz applications, using a new, simple, and highly adaptable 3D surface micromachining technology. The method utilizes simply modified conventional photolithography and well-established electroplating at a low process temperature (<120 °C), so that the post-IC process and batch fabrication are possible. We have fabricated a 20-turn SI2 with an inductance of 2.5 nH, a peak Q-factor of 19 at 5.5 GHz, and the surface area occupation of 800 μm by 90 μm excluding pads (50 nH/mm2), from the entirely unoptimized initial fabrication on a glass substrate. Also, a 10 nH and a peak Q of 12.5 at 2.3 GHz have been obtained from an 80-turn SI2 (27 nH/mm2).
| Original language | English |
|---|---|
| Pages (from-to) | 544-547 |
| Number of pages | 4 |
| Journal | Technical Digest - International Electron Devices Meeting |
| Publication status | Published - 1998 Dec 1 |
| Event | Proceedings of the 1998 IEEE International Electron Devices Meeting - San Francisco, CA, USA Duration: 1998 Dec 6 → 1998 Dec 9 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry
Cite this
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High-performance electroplated solenoid-type integrated inductor (SI2) for RF applications using simple 3D surface micromachining technology. / Yoon, Jun Bo; Kim, Bon Kee; Han, Chul Hi; Yoon, Euisik; Lee, Kwyro; Kim, Choong Ki.
In: Technical Digest - International Electron Devices Meeting, 01.12.1998, p. 544-547.Research output: Contribution to journal › Conference article
TY - JOUR
T1 - High-performance electroplated solenoid-type integrated inductor (SI2) for RF applications using simple 3D surface micromachining technology
AU - Yoon, Jun Bo
AU - Kim, Bon Kee
AU - Han, Chul Hi
AU - Yoon, Euisik
AU - Lee, Kwyro
AU - Kim, Choong Ki
PY - 1998/12/1
Y1 - 1998/12/1
N2 - Electroplated solenoid-type integrated inductors (SI2s) have been demonstrated to have high performance and small area occupation for GHz applications, using a new, simple, and highly adaptable 3D surface micromachining technology. The method utilizes simply modified conventional photolithography and well-established electroplating at a low process temperature (<120 °C), so that the post-IC process and batch fabrication are possible. We have fabricated a 20-turn SI2 with an inductance of 2.5 nH, a peak Q-factor of 19 at 5.5 GHz, and the surface area occupation of 800 μm by 90 μm excluding pads (50 nH/mm2), from the entirely unoptimized initial fabrication on a glass substrate. Also, a 10 nH and a peak Q of 12.5 at 2.3 GHz have been obtained from an 80-turn SI2 (27 nH/mm2).
AB - Electroplated solenoid-type integrated inductors (SI2s) have been demonstrated to have high performance and small area occupation for GHz applications, using a new, simple, and highly adaptable 3D surface micromachining technology. The method utilizes simply modified conventional photolithography and well-established electroplating at a low process temperature (<120 °C), so that the post-IC process and batch fabrication are possible. We have fabricated a 20-turn SI2 with an inductance of 2.5 nH, a peak Q-factor of 19 at 5.5 GHz, and the surface area occupation of 800 μm by 90 μm excluding pads (50 nH/mm2), from the entirely unoptimized initial fabrication on a glass substrate. Also, a 10 nH and a peak Q of 12.5 at 2.3 GHz have been obtained from an 80-turn SI2 (27 nH/mm2).
UR - http://www.scopus.com/inward/record.url?scp=0032256940&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=0032256940&partnerID=8YFLogxK
M3 - Conference article
AN - SCOPUS:0032256940
SP - 544
EP - 547
JO - Technical Digest - International Electron Devices Meeting
JF - Technical Digest - International Electron Devices Meeting
SN - 0163-1918
ER -