Abstract
In this paper, a novel magnetic tunnel junction (MTJ) based non-volatile flip-flop (NVFF) is proposed. The separated latch and sensing circuit structure maximizes the performance of latch operation, minimizes power consumption, and improves MTJ lifetime. Furthermore, the merged sensing and write circuit structure reduces area overhead. HSPICE simulation results using a 45-nm technology model show that the proposed NVFF achieves three times smaller power delay product with a 2% smaller layout area than the conventional NVFF.
| Original language | English |
|---|---|
| Title of host publication | 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 1953-1956 |
| Number of pages | 4 |
| ISBN (Print) | 9781479934324 |
| DOIs | |
| Publication status | Published - 2014 Jan 1 |
| Event | 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 - Melbourne, VIC, Australia Duration: 2014 Jun 1 → 2014 Jun 5 |
Publication series
| Name | Proceedings - IEEE International Symposium on Circuits and Systems |
|---|---|
| ISSN (Print) | 0271-4310 |
Other
| Other | 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014 |
|---|---|
| Country | Australia |
| City | Melbourne, VIC |
| Period | 14/6/1 → 14/6/5 |
Fingerprint
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering
Cite this
}
High-performance low-power magnetic tunnel junction based non-volatile flip-flop. / Na, Taehui; Ryu, Kyungho; Kim, Jisu; Jung, Seongook; Kim, Jung Pill; Kang, Seung H.
2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014. Institute of Electrical and Electronics Engineers Inc., 2014. p. 1953-1956 6865544 (Proceedings - IEEE International Symposium on Circuits and Systems).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - High-performance low-power magnetic tunnel junction based non-volatile flip-flop
AU - Na, Taehui
AU - Ryu, Kyungho
AU - Kim, Jisu
AU - Jung, Seongook
AU - Kim, Jung Pill
AU - Kang, Seung H.
PY - 2014/1/1
Y1 - 2014/1/1
N2 - In this paper, a novel magnetic tunnel junction (MTJ) based non-volatile flip-flop (NVFF) is proposed. The separated latch and sensing circuit structure maximizes the performance of latch operation, minimizes power consumption, and improves MTJ lifetime. Furthermore, the merged sensing and write circuit structure reduces area overhead. HSPICE simulation results using a 45-nm technology model show that the proposed NVFF achieves three times smaller power delay product with a 2% smaller layout area than the conventional NVFF.
AB - In this paper, a novel magnetic tunnel junction (MTJ) based non-volatile flip-flop (NVFF) is proposed. The separated latch and sensing circuit structure maximizes the performance of latch operation, minimizes power consumption, and improves MTJ lifetime. Furthermore, the merged sensing and write circuit structure reduces area overhead. HSPICE simulation results using a 45-nm technology model show that the proposed NVFF achieves three times smaller power delay product with a 2% smaller layout area than the conventional NVFF.
UR - http://www.scopus.com/inward/record.url?scp=84907397945&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84907397945&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2014.6865544
DO - 10.1109/ISCAS.2014.6865544
M3 - Conference contribution
SN - 9781479934324
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 1953
EP - 1956
BT - 2014 IEEE International Symposium on Circuits and Systems, ISCAS 2014
PB - Institute of Electrical and Electronics Engineers Inc.
ER -