Polymer ferroelectric-gate field effect transistors (Fe-FETs) employing ferroelectric polymer thin films as gate insulators are highly attractive as a next-generation non-volatile memory. Furthermore, polymer Fe-FETs have been recently of interest owing to their capability of storing data in more than 2 states in a single device, that is, they have multi-level cell (MLC) operation potential for high density data storage. However, among a variety of technological issues of MLC polymer Fe-FETs, the requirement of high voltage for cell operation is one of the most urgent problems. Here, a low voltage operating MLC polymer Fe-FET memory with a high dielectric constant (k) ferroelectric polymer insulator is presented. Effective enhancement of capacitance of the ferroelectric gate insulator layer is achieved by a simple binary solution-blend of a ferroelectric poly(vinylidene fluoride-co- trifluoroethylene) (PVDF-TrFE) (k ≈ 8) with a relaxer high-k poly(vinylidene-fluoride-trifluoroethylene-chlorotrifluoroethylene) (PVDF-TrFE-CTFE) (k ≈ 18). At optimized conditions, a ferroelectric insulator with a PVDF-TrFE/PVDF-TrFE-CTFE (10/5) blend composition enables the discrete six-level multi-state operation of a MLC Fe-FET at a gate voltage sweep of ±18 V with excellent data retention and endurance of each state of more than 104 s and 120 cycles, respectively.
All Science Journal Classification (ASJC) codes
- Materials Science(all)
- Condensed Matter Physics