Abstract
We present a high-speed monolithically integrated optical receiver fabricated with 0.13- μm standard complementary metal-oxide-semiconductor (CMOS) technology. The optical receiver consists of a CMOS-compatible avalanche photodetector (CMOS-APD) and a transimpedance amplifier (TIA). The CMOS-APD provides high responsivity as well as large bandwidth. Its bandwidth is further enhanced by the TIA having negative capacitance, which compensates undesired parasitic capacitance. With the CMOS integrated optical receiver, 4.25-Gb/s optical data are successfully transmitted with a bit-error rate less than 10 -12 at the incident optical power of 5.5 dBm.
| Original language | English |
|---|---|
| Article number | 26 |
| Pages (from-to) | 1553-1555 |
| Number of pages | 3 |
| Journal | IEEE Photonics Technology Letters |
| Volume | 21 |
| Issue number | 20 |
| DOIs | |
| Publication status | Published - 2009 Dec 1 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Atomic and Molecular Physics, and Optics
- Electrical and Electronic Engineering
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High-speed CMOS integrated optical receiver with an avalanche photodetector. / Youn, Jin Sung; Kang, Hyo Soon; Lee, Myung Jae; Park, Kang Yeob; Choi, Woo-Young.
In: IEEE Photonics Technology Letters, Vol. 21, No. 20, 26, 01.12.2009, p. 1553-1555.Research output: Contribution to journal › Article
TY - JOUR
T1 - High-speed CMOS integrated optical receiver with an avalanche photodetector
AU - Youn, Jin Sung
AU - Kang, Hyo Soon
AU - Lee, Myung Jae
AU - Park, Kang Yeob
AU - Choi, Woo-Young
PY - 2009/12/1
Y1 - 2009/12/1
N2 - We present a high-speed monolithically integrated optical receiver fabricated with 0.13- μm standard complementary metal-oxide-semiconductor (CMOS) technology. The optical receiver consists of a CMOS-compatible avalanche photodetector (CMOS-APD) and a transimpedance amplifier (TIA). The CMOS-APD provides high responsivity as well as large bandwidth. Its bandwidth is further enhanced by the TIA having negative capacitance, which compensates undesired parasitic capacitance. With the CMOS integrated optical receiver, 4.25-Gb/s optical data are successfully transmitted with a bit-error rate less than 10 -12 at the incident optical power of 5.5 dBm.
AB - We present a high-speed monolithically integrated optical receiver fabricated with 0.13- μm standard complementary metal-oxide-semiconductor (CMOS) technology. The optical receiver consists of a CMOS-compatible avalanche photodetector (CMOS-APD) and a transimpedance amplifier (TIA). The CMOS-APD provides high responsivity as well as large bandwidth. Its bandwidth is further enhanced by the TIA having negative capacitance, which compensates undesired parasitic capacitance. With the CMOS integrated optical receiver, 4.25-Gb/s optical data are successfully transmitted with a bit-error rate less than 10 -12 at the incident optical power of 5.5 dBm.
UR - http://www.scopus.com/inward/record.url?scp=77952538606&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=77952538606&partnerID=8YFLogxK
U2 - 10.1109/LPT.2009.2029869
DO - 10.1109/LPT.2009.2029869
M3 - Article
AN - SCOPUS:77952538606
VL - 21
SP - 1553
EP - 1555
JO - IEEE Photonics Technology Letters
JF - IEEE Photonics Technology Letters
SN - 1041-1135
IS - 20
M1 - 26
ER -