Highly stable bottom-gate nanocrystalline silicon thin film transistor fabricated employing ICP-CVD

Sun Jae Kim, Sang Myeon Han, Jang Yeon Kwon, Ji Sim Jung, Min Koo Hana

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Citations (Scopus)

Abstract

Bottom-gate nanocrystalline silicon (nc-Si) thin film transistors (TFTs) were fabricated and evaluated their characteristics and electrical stability under various stress condition. nc-Si with high crystallinity was deposited employing Inductively coupled plasma chemical vapor deposition(ICP-CVD) system. We employed helium gas diluted deposition and all the process temperature was kept under 350°C. We fabricated conventional inverted-staggered nc-Si TFTs. Fabricated nc-Si TFTs showed fine electrical characteristics, such as electrical mobility of 0.64-0.77 cm2/V.sec. We investigated its stability through constant-voltage stress and constant-current stress. The threshold voltage shift after 30, 000 seconds gate bias (10V) stress was only 0.098V, which is considerably less compared to a-Si:H TFT. Under the static current stress condition, the threshold voltage of the nc-Si TFT was shifted less than that of a-Si:H TFT. It demonstrates that nc-Si TFT exhibit better stability than conventional a-Si:H TFT.

Original languageEnglish
Title of host publicationECS Transactions - Thin Film Transistors 9, TFT 9
Pages171-176
Number of pages6
Edition9
DOIs
Publication statusPublished - 2008 Dec 1
EventThin Film Transistors 9, TFT 9 - 214th ECS Meeting - Honolulu, HI, United States
Duration: 2008 Oct 132008 Oct 16

Publication series

NameECS Transactions
Number9
Volume16
ISSN (Print)1938-5862
ISSN (Electronic)1938-6737

Other

OtherThin Film Transistors 9, TFT 9 - 214th ECS Meeting
CountryUnited States
CityHonolulu, HI
Period08/10/1308/10/16

Fingerprint

Nanocrystalline silicon
Inductively coupled plasma
Thin film transistors
Chemical vapor deposition
Threshold voltage
Gates (transistor)
Helium
Electric potential

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Cite this

Kim, S. J., Han, S. M., Kwon, J. Y., Jung, J. S., & Hana, M. K. (2008). Highly stable bottom-gate nanocrystalline silicon thin film transistor fabricated employing ICP-CVD. In ECS Transactions - Thin Film Transistors 9, TFT 9 (9 ed., pp. 171-176). (ECS Transactions; Vol. 16, No. 9). https://doi.org/10.1149/1.2980547
Kim, Sun Jae ; Han, Sang Myeon ; Kwon, Jang Yeon ; Jung, Ji Sim ; Hana, Min Koo. / Highly stable bottom-gate nanocrystalline silicon thin film transistor fabricated employing ICP-CVD. ECS Transactions - Thin Film Transistors 9, TFT 9. 9. ed. 2008. pp. 171-176 (ECS Transactions; 9).
@inproceedings{42d6c5368af74556ba90103e260bc442,
title = "Highly stable bottom-gate nanocrystalline silicon thin film transistor fabricated employing ICP-CVD",
abstract = "Bottom-gate nanocrystalline silicon (nc-Si) thin film transistors (TFTs) were fabricated and evaluated their characteristics and electrical stability under various stress condition. nc-Si with high crystallinity was deposited employing Inductively coupled plasma chemical vapor deposition(ICP-CVD) system. We employed helium gas diluted deposition and all the process temperature was kept under 350°C. We fabricated conventional inverted-staggered nc-Si TFTs. Fabricated nc-Si TFTs showed fine electrical characteristics, such as electrical mobility of 0.64-0.77 cm2/V.sec. We investigated its stability through constant-voltage stress and constant-current stress. The threshold voltage shift after 30, 000 seconds gate bias (10V) stress was only 0.098V, which is considerably less compared to a-Si:H TFT. Under the static current stress condition, the threshold voltage of the nc-Si TFT was shifted less than that of a-Si:H TFT. It demonstrates that nc-Si TFT exhibit better stability than conventional a-Si:H TFT.",
author = "Kim, {Sun Jae} and Han, {Sang Myeon} and Kwon, {Jang Yeon} and Jung, {Ji Sim} and Hana, {Min Koo}",
year = "2008",
month = "12",
day = "1",
doi = "10.1149/1.2980547",
language = "English",
isbn = "9781566776554",
series = "ECS Transactions",
number = "9",
pages = "171--176",
booktitle = "ECS Transactions - Thin Film Transistors 9, TFT 9",
edition = "9",

}

Kim, SJ, Han, SM, Kwon, JY, Jung, JS & Hana, MK 2008, Highly stable bottom-gate nanocrystalline silicon thin film transistor fabricated employing ICP-CVD. in ECS Transactions - Thin Film Transistors 9, TFT 9. 9 edn, ECS Transactions, no. 9, vol. 16, pp. 171-176, Thin Film Transistors 9, TFT 9 - 214th ECS Meeting, Honolulu, HI, United States, 08/10/13. https://doi.org/10.1149/1.2980547

Highly stable bottom-gate nanocrystalline silicon thin film transistor fabricated employing ICP-CVD. / Kim, Sun Jae; Han, Sang Myeon; Kwon, Jang Yeon; Jung, Ji Sim; Hana, Min Koo.

ECS Transactions - Thin Film Transistors 9, TFT 9. 9. ed. 2008. p. 171-176 (ECS Transactions; Vol. 16, No. 9).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - Highly stable bottom-gate nanocrystalline silicon thin film transistor fabricated employing ICP-CVD

AU - Kim, Sun Jae

AU - Han, Sang Myeon

AU - Kwon, Jang Yeon

AU - Jung, Ji Sim

AU - Hana, Min Koo

PY - 2008/12/1

Y1 - 2008/12/1

N2 - Bottom-gate nanocrystalline silicon (nc-Si) thin film transistors (TFTs) were fabricated and evaluated their characteristics and electrical stability under various stress condition. nc-Si with high crystallinity was deposited employing Inductively coupled plasma chemical vapor deposition(ICP-CVD) system. We employed helium gas diluted deposition and all the process temperature was kept under 350°C. We fabricated conventional inverted-staggered nc-Si TFTs. Fabricated nc-Si TFTs showed fine electrical characteristics, such as electrical mobility of 0.64-0.77 cm2/V.sec. We investigated its stability through constant-voltage stress and constant-current stress. The threshold voltage shift after 30, 000 seconds gate bias (10V) stress was only 0.098V, which is considerably less compared to a-Si:H TFT. Under the static current stress condition, the threshold voltage of the nc-Si TFT was shifted less than that of a-Si:H TFT. It demonstrates that nc-Si TFT exhibit better stability than conventional a-Si:H TFT.

AB - Bottom-gate nanocrystalline silicon (nc-Si) thin film transistors (TFTs) were fabricated and evaluated their characteristics and electrical stability under various stress condition. nc-Si with high crystallinity was deposited employing Inductively coupled plasma chemical vapor deposition(ICP-CVD) system. We employed helium gas diluted deposition and all the process temperature was kept under 350°C. We fabricated conventional inverted-staggered nc-Si TFTs. Fabricated nc-Si TFTs showed fine electrical characteristics, such as electrical mobility of 0.64-0.77 cm2/V.sec. We investigated its stability through constant-voltage stress and constant-current stress. The threshold voltage shift after 30, 000 seconds gate bias (10V) stress was only 0.098V, which is considerably less compared to a-Si:H TFT. Under the static current stress condition, the threshold voltage of the nc-Si TFT was shifted less than that of a-Si:H TFT. It demonstrates that nc-Si TFT exhibit better stability than conventional a-Si:H TFT.

UR - http://www.scopus.com/inward/record.url?scp=63149105520&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=63149105520&partnerID=8YFLogxK

U2 - 10.1149/1.2980547

DO - 10.1149/1.2980547

M3 - Conference contribution

AN - SCOPUS:63149105520

SN - 9781566776554

T3 - ECS Transactions

SP - 171

EP - 176

BT - ECS Transactions - Thin Film Transistors 9, TFT 9

ER -

Kim SJ, Han SM, Kwon JY, Jung JS, Hana MK. Highly stable bottom-gate nanocrystalline silicon thin film transistor fabricated employing ICP-CVD. In ECS Transactions - Thin Film Transistors 9, TFT 9. 9 ed. 2008. p. 171-176. (ECS Transactions; 9). https://doi.org/10.1149/1.2980547