Hysteresis mechanisms of pentacene thin-film transistors with polymer/oxide bilayer gate dielectrics

D. K. Hwang, Min Suk Oh, Jung Min Hwang, Jae Hoon Kim, Seongil Im

Research output: Contribution to journalArticlepeer-review

108 Citations (Scopus)

Abstract

We have studied the electrical stability of organic poly-4-vinyl phenol (PVP)/inorganic oxide bilayer gate dielectrics for low-voltage pentacene thin-film transistors (TFTs). Curing conditions of spin-cast PVP influence on the drain current-gate bias hysteresis behavior; long term curing reduces the magnitude of the hysteresis, which can also be reduced by decreasing the PVP thickness. The electron charge injection from gate electrode plays as another cause of the electrical hysteresis. These instabilities are categorized into the following three: channel/dielectric interface-induced, slow polarization-induced, and gate charge injection-induced hystereses. By examining the hysteresis behavior of pentacene TFTs with five different combinations of bilayer dielectric, we clarified the instability mechanisms responsible for the electrical hysteresis.

Original languageEnglish
Article number013304
JournalApplied Physics Letters
Volume92
Issue number1
DOIs
Publication statusPublished - 2008

Bibliographical note

Funding Information:
The authors appreciate the financial support from KOSEF (Program No. 2002-03177) and LG Philips LCD Co., and they also acknowledge the support from Brain Korea 21.

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy (miscellaneous)

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