TY - JOUR
T1 - Impact of the memory interface structure in the memory-processor integrated architecture for computer vision
AU - Kim, Youngsik
AU - Han, Tack Don
AU - Kim, Shin Dug
N1 - Copyright:
Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2000/1/31
Y1 - 2000/1/31
N2 - The memory-based processor array (MPA) was previously designed as an effective memory-processor integrated architecture. The MPA can be easily attached into any host system via memory interface. In this paper, the impact of the memory interface structure is analytically analyzed for computer vision tasks. An analytical model is constructed to describe the characteristics of the memory interface structure. Performance improvement for the memory interface model of the MPA system can be 6-40% for vision tasks consisting of sequential and data parallel tasks. Mapping algorithms to implement convolution and connected component labeling on the MPA are also presented. The asymptotic time complexities of the algorithms are evaluated to verify the cost-effectiveness and the efficiency of the MPA system.
AB - The memory-based processor array (MPA) was previously designed as an effective memory-processor integrated architecture. The MPA can be easily attached into any host system via memory interface. In this paper, the impact of the memory interface structure is analytically analyzed for computer vision tasks. An analytical model is constructed to describe the characteristics of the memory interface structure. Performance improvement for the memory interface model of the MPA system can be 6-40% for vision tasks consisting of sequential and data parallel tasks. Mapping algorithms to implement convolution and connected component labeling on the MPA are also presented. The asymptotic time complexities of the algorithms are evaluated to verify the cost-effectiveness and the efficiency of the MPA system.
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U2 - 10.1016/S1383-7621(99)00005-3
DO - 10.1016/S1383-7621(99)00005-3
M3 - Article
AN - SCOPUS:0033883078
VL - 46
SP - 259
EP - 274
JO - Journal of Systems Architecture
JF - Journal of Systems Architecture
SN - 1383-7621
IS - 3
ER -