Impact of the memory interface structure in the memory-processor integrated architecture for computer vision

Youngsik Kim, Tack Don Han, Shin Dug Kim

Research output: Contribution to journalArticle

1 Citation (Scopus)


The memory-based processor array (MPA) was previously designed as an effective memory-processor integrated architecture. The MPA can be easily attached into any host system via memory interface. In this paper, the impact of the memory interface structure is analytically analyzed for computer vision tasks. An analytical model is constructed to describe the characteristics of the memory interface structure. Performance improvement for the memory interface model of the MPA system can be 6-40% for vision tasks consisting of sequential and data parallel tasks. Mapping algorithms to implement convolution and connected component labeling on the MPA are also presented. The asymptotic time complexities of the algorithms are evaluated to verify the cost-effectiveness and the efficiency of the MPA system.

Original languageEnglish
Pages (from-to)259-274
Number of pages16
JournalJournal of Systems Architecture
Issue number3
Publication statusPublished - 2000 Jan 31


All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture

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