Improved Ge surface passivation with ultrathin SiOX enabling high-mobility surface channel pMOSFETs featuring a HfSiO/WN gate stack

Sachin Joshi, Cristiano Krug, Dawei Heh, Hoon Joo Na, Harlan R. Harris, Jungwoo Oh, Paul D. Kirsch, Prashant Majhi, Byoung Hun Lee, Hsing Huang Tseng, Raj Jammy, Jack C. Lee, Sanjay K. Banerjee

Research output: Contribution to journalArticle

34 Citations (Scopus)

Abstract

To realize high-mobility surface channel pMOSFETs on Ge, a 1.6-nm-thick SiOx passivation layer between the bulk Ge substrate and HfSiO gate dielectric was introduced. This approach provides a simple alternative to epitaxial Si deposition followed by selective oxidation and leads to one of the highest peak hole mobilities reported for unstrained surface channel pMOSFETs on Ge: 332cm2 · V-1 · s-1 at 0.05 MV/cm - a 2× enhancement over the universal Si/SiO2 mobility. The devices show well-behaved output and transfer characteristics, an equivalent oxide thickness of 1.85 nm and an ION/IOFF ratio of 3 × 103 without detectable fast transient charging. The high hole mobility of these devices is attributed to adequate passivation of the Ge surface.

Original languageEnglish
Pages (from-to)308-311
Number of pages4
JournalIEEE Electron Device Letters
Volume28
Issue number4
DOIs
Publication statusPublished - 2007 Apr 1

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Passivation
Hole mobility
Gate dielectrics
Oxides
Oxidation
Substrates

All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Joshi, Sachin ; Krug, Cristiano ; Heh, Dawei ; Na, Hoon Joo ; Harris, Harlan R. ; Oh, Jungwoo ; Kirsch, Paul D. ; Majhi, Prashant ; Lee, Byoung Hun ; Tseng, Hsing Huang ; Jammy, Raj ; Lee, Jack C. ; Banerjee, Sanjay K. / Improved Ge surface passivation with ultrathin SiOX enabling high-mobility surface channel pMOSFETs featuring a HfSiO/WN gate stack. In: IEEE Electron Device Letters. 2007 ; Vol. 28, No. 4. pp. 308-311.
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abstract = "To realize high-mobility surface channel pMOSFETs on Ge, a 1.6-nm-thick SiOx passivation layer between the bulk Ge substrate and HfSiO gate dielectric was introduced. This approach provides a simple alternative to epitaxial Si deposition followed by selective oxidation and leads to one of the highest peak hole mobilities reported for unstrained surface channel pMOSFETs on Ge: 332cm2 · V-1 · s-1 at 0.05 MV/cm - a 2× enhancement over the universal Si/SiO2 mobility. The devices show well-behaved output and transfer characteristics, an equivalent oxide thickness of 1.85 nm and an ION/IOFF ratio of 3 × 103 without detectable fast transient charging. The high hole mobility of these devices is attributed to adequate passivation of the Ge surface.",
author = "Sachin Joshi and Cristiano Krug and Dawei Heh and Na, {Hoon Joo} and Harris, {Harlan R.} and Jungwoo Oh and Kirsch, {Paul D.} and Prashant Majhi and Lee, {Byoung Hun} and Tseng, {Hsing Huang} and Raj Jammy and Lee, {Jack C.} and Banerjee, {Sanjay K.}",
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Joshi, S, Krug, C, Heh, D, Na, HJ, Harris, HR, Oh, J, Kirsch, PD, Majhi, P, Lee, BH, Tseng, HH, Jammy, R, Lee, JC & Banerjee, SK 2007, 'Improved Ge surface passivation with ultrathin SiOX enabling high-mobility surface channel pMOSFETs featuring a HfSiO/WN gate stack', IEEE Electron Device Letters, vol. 28, no. 4, pp. 308-311. https://doi.org/10.1109/LED.2007.893274

Improved Ge surface passivation with ultrathin SiOX enabling high-mobility surface channel pMOSFETs featuring a HfSiO/WN gate stack. / Joshi, Sachin; Krug, Cristiano; Heh, Dawei; Na, Hoon Joo; Harris, Harlan R.; Oh, Jungwoo; Kirsch, Paul D.; Majhi, Prashant; Lee, Byoung Hun; Tseng, Hsing Huang; Jammy, Raj; Lee, Jack C.; Banerjee, Sanjay K.

In: IEEE Electron Device Letters, Vol. 28, No. 4, 01.04.2007, p. 308-311.

Research output: Contribution to journalArticle

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T1 - Improved Ge surface passivation with ultrathin SiOX enabling high-mobility surface channel pMOSFETs featuring a HfSiO/WN gate stack

AU - Joshi, Sachin

AU - Krug, Cristiano

AU - Heh, Dawei

AU - Na, Hoon Joo

AU - Harris, Harlan R.

AU - Oh, Jungwoo

AU - Kirsch, Paul D.

AU - Majhi, Prashant

AU - Lee, Byoung Hun

AU - Tseng, Hsing Huang

AU - Jammy, Raj

AU - Lee, Jack C.

AU - Banerjee, Sanjay K.

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AB - To realize high-mobility surface channel pMOSFETs on Ge, a 1.6-nm-thick SiOx passivation layer between the bulk Ge substrate and HfSiO gate dielectric was introduced. This approach provides a simple alternative to epitaxial Si deposition followed by selective oxidation and leads to one of the highest peak hole mobilities reported for unstrained surface channel pMOSFETs on Ge: 332cm2 · V-1 · s-1 at 0.05 MV/cm - a 2× enhancement over the universal Si/SiO2 mobility. The devices show well-behaved output and transfer characteristics, an equivalent oxide thickness of 1.85 nm and an ION/IOFF ratio of 3 × 103 without detectable fast transient charging. The high hole mobility of these devices is attributed to adequate passivation of the Ge surface.

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