@inproceedings{5999c2618cce409b8215c85d4ef40725,
title = "Integration of dual channel timing formatter system for high speed memory test equipment",
abstract = "This paper proposes a dual channel timing formatter system for high speed memory test equipment. The proposed architecture supports 256 kinds of waveform with 20ps timing resolution. Moreover, timing problem is reduced because a timing generator is embedded.",
author = "Jaeseok Park and Ingeol Lee and Park, {Young Seok} and Kim, {Sung Geun} and Ryu, {Kyung Ho} and Jung, {Dong Hoon} and Kangwook Jo and Lee, {Choong Keun} and Hongil Yoon and Jung, {Seong Ook} and Choi, {Woo Young} and Sungho Kang",
year = "2012",
doi = "10.1109/ISOCC.2012.6407070",
language = "English",
isbn = "9781467329880",
series = "ISOCC 2012 - 2012 International SoC Design Conference",
pages = "185--187",
booktitle = "ISOCC 2012 - 2012 International SoC Design Conference",
note = "2012 International SoC Design Conference, ISOCC 2012 ; Conference date: 04-11-2012 Through 07-11-2012",
}