Abstract
Fully integrated 10-, 20-, and 40-GHz frequency sources are presented, which are implemented with a 0.18-μm CMOS process. A 10-GHz quadrature voltage-controlled oscillator (QVCO) is designed to have output with a low dc level, which can be effectively followed by a frequency multiplier. The proposed multipliers generate signals of 20 and 40 GHz using the harmonics of the QVCO. To have more harmonic power, a frequency doubler with pinchoff clipping is used without any buffers or de-level shifters. The QVCO has a low phase noise of -118.67 dBc/Hz at a 1-MHz offset frequency with a 1.8-V power supply. The transistor size effect on phase noise is investigated. The frequency doubler has a low phase noise of -111.67 dBc/Hz at a 1-MHz offset frequency is measured, which is 7 dB higher than a phase noise of the QVCO. The doubler can be tuned between 19.8-22 GHz and the output is -6.83 dBm. A fourth-order frequency multiplier, which is used to obtain 40-GHz outputs, shows a phase noise of -102.0 dBc/Hz at 1-MHz offset frequency with the output power of -18.0 dBm. A large tuning range of 39.3-43.67 GHz (10%) is observed.
Original language | English |
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Pages (from-to) | 2789-2800 |
Number of pages | 12 |
Journal | IEEE Transactions on Microwave Theory and Techniques |
Volume | 53 |
Issue number | 9 |
DOIs | |
Publication status | Published - 2005 Sept |
Bibliographical note
Funding Information:Manuscript received August 12, 2004; revised January 24, 2005. This work was supported in part by the Korea KOSEF under the ERC Program through the MINT Research Center, Dongguk University. The authors are with the Department of Electrical Engineering and Computer Science, Korea Advanced Institute of Science and Technology, Daejeon 305-701, Korea (e-mail: constant@eeinfo.kaist.ac.kr). Digital Object Identifier 10.1109/TMTT.2005.854179
All Science Journal Classification (ASJC) codes
- Radiation
- Condensed Matter Physics
- Electrical and Electronic Engineering