Ka-band SiGe HBT low phase imbalance differential 3-bit variable gain LNA

Byung Wook Min; Gabriel M. Rebeiz

doi:10.1109/LMWC.2008.918917

Ka-band SiGe HBT low phase imbalance differential 3-bit variable gain LNA

Byung Wook Min, Gabriel M. Rebeiz

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

32 Citations (Scopus)

Abstract

This letter presents the design and implementation of a differential Ka-band variable gain low noise amplifier (VG-LNA) with low insertion phase imbalance. The VG-LNA is based on a 0.12 μm SiGe heterojunction bipolar transistor process, and the gain variation is achieved using bias current steering. The measured VG-LNA gain at 32-34 GHz is 9-20 dB with eight different linear-in-magnitude gain states, and with a noise figure of 3.4-4.3 dB. The measured rms phase imbalance is < 2.5° at 26-40 GHz for all gain states and this is achieved using a novel compensating resistor in the bias network. The VG-LNA consumes 33 mW (13.5 mA, 2.5 V) and the input 1-dB gain compression point is -27 dBm. The chip size is 0.13 mm² without pads.

Original language	English
Article number	4470112
Pages (from-to)	272-274
Number of pages	3
Journal	IEEE Microwave and Wireless Components Letters
Volume	18
Issue number	4
DOIs	https://doi.org/10.1109/LMWC.2008.918917
Publication status	Published - 2008 Apr

Bibliographical note

Funding Information:
Manuscript received October 19, 2007; revised December 5, 2007. This work was supported by the U.S. Army Research Lab. under the CTA effort. B-W. Min is with the Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 49109 USA (e-mail:bmin@umich.edu). G. M. Rebeiz is with the Electrical and Computer Engineering, University of California, San Diego, CA 92093 USA (e-mail:rebeiz@ece.ucsd.edu). Digital Object Identifier 10.1109/LMWC.2008.918917 Fig. 1. Basic types of VGA: (a) bias control, (b) feedback control, and (c) current splitting.

All Science Journal Classification (ASJC) codes

Condensed Matter Physics
Electrical and Electronic Engineering

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abstract = "This letter presents the design and implementation of a differential Ka-band variable gain low noise amplifier (VG-LNA) with low insertion phase imbalance. The VG-LNA is based on a 0.12 μm SiGe heterojunction bipolar transistor process, and the gain variation is achieved using bias current steering. The measured VG-LNA gain at 32-34 GHz is 9-20 dB with eight different linear-in-magnitude gain states, and with a noise figure of 3.4-4.3 dB. The measured rms phase imbalance is < 2.5° at 26-40 GHz for all gain states and this is achieved using a novel compensating resistor in the bias network. The VG-LNA consumes 33 mW (13.5 mA, 2.5 V) and the input 1-dB gain compression point is -27 dBm. The chip size is 0.13 mm2 without pads.",

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note = "Funding Information: Manuscript received October 19, 2007; revised December 5, 2007. This work was supported by the U.S. Army Research Lab. under the CTA effort. B-W. Min is with the Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI 49109 USA (e-mail:bmin@umich.edu). G. M. Rebeiz is with the Electrical and Computer Engineering, University of California, San Diego, CA 92093 USA (e-mail:rebeiz@ece.ucsd.edu). Digital Object Identifier 10.1109/LMWC.2008.918917 Fig. 1. Basic types of VGA: (a) bias control, (b) feedback control, and (c) current splitting.",

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N2 - This letter presents the design and implementation of a differential Ka-band variable gain low noise amplifier (VG-LNA) with low insertion phase imbalance. The VG-LNA is based on a 0.12 μm SiGe heterojunction bipolar transistor process, and the gain variation is achieved using bias current steering. The measured VG-LNA gain at 32-34 GHz is 9-20 dB with eight different linear-in-magnitude gain states, and with a noise figure of 3.4-4.3 dB. The measured rms phase imbalance is < 2.5° at 26-40 GHz for all gain states and this is achieved using a novel compensating resistor in the bias network. The VG-LNA consumes 33 mW (13.5 mA, 2.5 V) and the input 1-dB gain compression point is -27 dBm. The chip size is 0.13 mm2 without pads.

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