Libra: Tailoring SIMD execution using heterogeneous hardware and dynamic configurability

Yongjun Park, Jason Jong Kyu Park, Hyunchul Park, Scott Mahlke

Research output: Chapter in Book/Report/Conference proceedingConference contribution

20 Citations (Scopus)

Abstract

Mobile computing as exemplified by the smart phone has become an integral part of our daily lives. The next generation of these devices will be driven by providing an even richer user experience and compelling capabilities: higher definition multimedia, 3D graphics, augmented reality, games, and voice interfaces. To address these goals, the core computing capabilities of the smart phone must be scaled. However, the energy budgets are increasing at a much lower rate, requiring fundamental improvements in computing efficiency. SIMD accelerators offer the combination of high performance and low energy consumption through low control and interconnect overhead. However, SIMD accelerators are not a panacea. Many applications lack sufficient vector parallelism to effectively utilize a large number of SIMD lanes. Further, the use of symmetric hardware lanes leads to low utilization and high static power dissipation as SIMD width is scaled. To address these inefficiencies, this paper focuses on breaking two traditional rules of SIMD processing: homogeneity and static configuration. The Libra accelerator increases SIMD utility by blurring the divide between vector and instruction parallelism to support efficient execution of a wider range of loops, and it increases hardware utilization through the use of heterogeneous hardware across the SIMD lanes. Experimental results show that the 32-lane Libra outperforms traditional SIMD accelerators by an average of 1.58x performance improvement due to higher loop coverage with 29% less energy consumption through heterogeneous hardware.

Original languageEnglish
Title of host publicationProceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012
Pages84-95
Number of pages12
DOIs
Publication statusPublished - 2012
Event2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012 - Vancouver, BC, Canada
Duration: 2012 Dec 12012 Dec 5

Publication series

NameProceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012

Conference

Conference2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012
Country/TerritoryCanada
CityVancouver, BC
Period12/12/112/12/5

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

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