Low complexity pipeline FFT processor for MIMO-OFDM systems

In this paper, we propose a low complexity pipeline F1FT processor for MIMO-OFDM systems with four transmitting and four receiving (4 x 4) antennas. The proposed FFT processor is based on multi-channel structure which enables to support multiple data streams efficiently. With mixed-radix algorithm, the number of non-trivial multiplications of the proposed FFT processor are decreased. Implementation results show that the proposed FFT processor reduces the required number of logic gates by 25% over the conventional 4-channel R4MDC FFT processor which has been considered to be the most area-efficient FFT processor for 4 × 4 MIMO-OFDM systems.