Low-Complexity Symbol Detector for MIMO-OFDM-Based Wireless LANs

Seungpyo Noh, Yunho Jung, Jaeseok Kim

Research output: Contribution to journalArticle

16 Citations (Scopus)

Abstract

In this brief, a low-complexity hardware architecture for multiple-input multiple-output (MIMO) orthogonal frequency-division multiplexing (OFDM) symbol detectors with two transmit and two receive antennas is proposed. The detectors support two MIMO-OFDM schemes of space–frequency block coded OFDM and space-division multiplexing OFDM in order to achieve higher performance and throughput However, symbol detection processes for these two schemes have high computational complexity, which is a burden to hardware implementation of MIMO-OFDM symbol detectors. In order to reduce complexity, the proposed symbol detector is designed with shared architecture, where similar functional blocks are merged and share the hardware resources, and results in the reduction of logic gates by 34% over a conventional architecture employing two individual detectors.

Original languageEnglish
Pages (from-to)1403-1407
Number of pages5
JournalIEEE Transactions on Circuits and Systems II: Express Briefs
Volume53
Issue number12
DOIs
Publication statusPublished - 2006 Dec

Fingerprint

Local area networks
Orthogonal frequency division multiplexing
Detectors
Hardware
Logic gates
Multiplexing
Computer hardware
Computational complexity
Throughput
Antennas

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

Cite this

@article{c3abaa177b4d490fae96ab52c5e8606a,
title = "Low-Complexity Symbol Detector for MIMO-OFDM-Based Wireless LANs",
abstract = "In this brief, a low-complexity hardware architecture for multiple-input multiple-output (MIMO) orthogonal frequency-division multiplexing (OFDM) symbol detectors with two transmit and two receive antennas is proposed. The detectors support two MIMO-OFDM schemes of space–frequency block coded OFDM and space-division multiplexing OFDM in order to achieve higher performance and throughput However, symbol detection processes for these two schemes have high computational complexity, which is a burden to hardware implementation of MIMO-OFDM symbol detectors. In order to reduce complexity, the proposed symbol detector is designed with shared architecture, where similar functional blocks are merged and share the hardware resources, and results in the reduction of logic gates by 34{\%} over a conventional architecture employing two individual detectors.",
author = "Seungpyo Noh and Yunho Jung and Jaeseok Kim",
year = "2006",
month = "12",
doi = "10.1109/TCSII.2006.884122",
language = "English",
volume = "53",
pages = "1403--1407",
journal = "IEEE Transactions on Circuits and Systems II: Express Briefs",
issn = "1549-7747",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "12",

}

Low-Complexity Symbol Detector for MIMO-OFDM-Based Wireless LANs. / Noh, Seungpyo; Jung, Yunho; Kim, Jaeseok.

In: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 53, No. 12, 12.2006, p. 1403-1407.

Research output: Contribution to journalArticle

TY - JOUR

T1 - Low-Complexity Symbol Detector for MIMO-OFDM-Based Wireless LANs

AU - Noh, Seungpyo

AU - Jung, Yunho

AU - Kim, Jaeseok

PY - 2006/12

Y1 - 2006/12

N2 - In this brief, a low-complexity hardware architecture for multiple-input multiple-output (MIMO) orthogonal frequency-division multiplexing (OFDM) symbol detectors with two transmit and two receive antennas is proposed. The detectors support two MIMO-OFDM schemes of space–frequency block coded OFDM and space-division multiplexing OFDM in order to achieve higher performance and throughput However, symbol detection processes for these two schemes have high computational complexity, which is a burden to hardware implementation of MIMO-OFDM symbol detectors. In order to reduce complexity, the proposed symbol detector is designed with shared architecture, where similar functional blocks are merged and share the hardware resources, and results in the reduction of logic gates by 34% over a conventional architecture employing two individual detectors.

AB - In this brief, a low-complexity hardware architecture for multiple-input multiple-output (MIMO) orthogonal frequency-division multiplexing (OFDM) symbol detectors with two transmit and two receive antennas is proposed. The detectors support two MIMO-OFDM schemes of space–frequency block coded OFDM and space-division multiplexing OFDM in order to achieve higher performance and throughput However, symbol detection processes for these two schemes have high computational complexity, which is a burden to hardware implementation of MIMO-OFDM symbol detectors. In order to reduce complexity, the proposed symbol detector is designed with shared architecture, where similar functional blocks are merged and share the hardware resources, and results in the reduction of logic gates by 34% over a conventional architecture employing two individual detectors.

UR - http://www.scopus.com/inward/record.url?scp=33947396381&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33947396381&partnerID=8YFLogxK

U2 - 10.1109/TCSII.2006.884122

DO - 10.1109/TCSII.2006.884122

M3 - Article

AN - SCOPUS:33947396381

VL - 53

SP - 1403

EP - 1407

JO - IEEE Transactions on Circuits and Systems II: Express Briefs

JF - IEEE Transactions on Circuits and Systems II: Express Briefs

SN - 1549-7747

IS - 12

ER -