This paper presents a delay sum true time delay (TTD) architecture. The proposed TTD divides the input signal to two signals with different time delays, then combines them in-phase at the output port. The variable time delay can be achieved by changing the power dividing and combining ratio of the two signals. The proposed TTD can provide lower insertion loss than varactor-loaded transmission line or switched delay line TTD, since it can achieve the large and continuously controlled time delay with a compact size. Also, this paper proposes a variable power divider/combiner with an increased range of the power dividing/combining ratio. The proposed delay sum TTD is demonstrated at 2.4 GHz. The measured insertion loss is only 2.3±0.25 dB with the continuously tunable delay of 843 ps (>720°), while maintaining the impedance matching below -10dB.
|Title of host publication||IMS 2020 - 2020 IEEE/MTT-S International Microwave Symposium|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||4|
|Publication status||Published - 2020 Aug|
|Event||2020 IEEE/MTT-S International Microwave Symposium, IMS 2020 - Virtual, Los Angeles, United States|
Duration: 2020 Aug 4 → 2020 Aug 6
|Name||IEEE MTT-S International Microwave Symposium Digest|
|Conference||2020 IEEE/MTT-S International Microwave Symposium, IMS 2020|
|City||Virtual, Los Angeles|
|Period||20/8/4 → 20/8/6|
Bibliographical noteFunding Information:
ACKNOWLEDGMENT This work was supported by Space Core Technology Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science and ICT (NRF-2017M1A3A3A02016255).
All Science Journal Classification (ASJC) codes
- Condensed Matter Physics
- Electrical and Electronic Engineering