Low-power embedded processor design using branch direction

Gi Ho Park; Jung Wook Park; Gunok Jung; Shin-Dug Kim

doi:10.1587/transfun.E92.A.3180

Low-power embedded processor design using branch direction

Gi Ho Park, Jung Wook Park, Gunok Jung, Shin-Dug Kim

Department of Computer Science

Research output: Contribution to journal › Article

Abstract

This paper presents a wordline gating logic for reducing unnecessary BTB accesses. Partial bit of the branch predictor was simultaneously recorded in the middle of BTB to prevent further SRAM operation. Experimental results with embedded applications showed that the proposed mechanism reduces around 38% of BTB power consumption.

Original language	English
Pages (from-to)	3180-3181
Number of pages	2
Journal	IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Volume	E92-A
Issue number	12
DOIs	https://doi.org/10.1587/transfun.E92.A.3180
Publication status	Published - 2009 Jan 1

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All Science Journal Classification (ASJC) codes

Signal Processing
Computer Graphics and Computer-Aided Design
Electrical and Electronic Engineering
Applied Mathematics

Cite this

Park, G. H., Park, J. W., Jung, G., & Kim, S-D. (2009). Low-power embedded processor design using branch direction. IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E92-A(12), 3180-3181. https://doi.org/10.1587/transfun.E92.A.3180

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Access to Document

10.1587/transfun.E92.A.3180