Low-power low-complexity MIMO-OFDM baseband processor for wireless LANs

Junha Im, Misuk Cho, Yunho Jung, Jaeseok Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

6 Citations (Scopus)

Abstract

In this paper, we propose an efficient design and implementation results of a high speed 2TX-2RX multiple-input multiple-output orthogonal frequency division multiplexing (MIMO-OFDM) wireless LAN (WLAN) baseband processor. The proposed processor includes bit-parallel processing transmitter physical layer convergence procedure (TX-PLCP) processor and space-division multiplexing (SDM) symbol detector, which have been optimized for low power consumption and low hardware overhead. It was implemented using 0.18-μm CMOS technology. The proposed architecture can operate at a 40-MHz clock frequency and supports the maximum data rate of 130Mbps. The logic gate count for the processor is 978K and the power consumption is 62 / 284mW (TX / RX), respectively.

Original languageEnglish
Title of host publication2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
Pages601-604
Number of pages4
DOIs
Publication statusPublished - 2009
Event2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009 - Taipei, Taiwan, Province of China
Duration: 2009 May 242009 May 27

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

Other2009 IEEE International Symposium on Circuits and Systems, ISCAS 2009
CountryTaiwan, Province of China
CityTaipei
Period09/5/2409/5/27

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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