Low power SRAM bitcell design for near-Threshold operation

Juhyun Park, Hanwool Jeong, Hyun Jun Kim, Seong Ook Jung

Research output: Chapter in Book/Report/Conference proceedingConference contribution

1 Citation (Scopus)

Abstract

Near-Threshold voltage (Vth) operating circuit is necessary for battery-operated devices. Especially, static random access memory (SRAM) design is important in near-Vth region because it is vulnerable to Vth variation. The conventional 6T SRAM bitcell design for super-Vth operation cannot be used for near-Vth operation because Vth variation in near-Vth region is more serious than that in super-Vth region. In addition, error correction code (ECC) is required to achieve high read stability and write ability yields. In this paper, bitcell yield according to ECC type in SRAM is analyzed and the efficient near-Vth bitcell design is determined with considering area overhead in 65nm technology.

Original languageEnglish
Title of host publication2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781509027439
DOIs
Publication statusPublished - 2017 Jan 3
Event2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016 - Seoul, Korea, Republic of
Duration: 2016 Oct 262016 Oct 28

Other

Other2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016
CountryKorea, Republic of
CitySeoul
Period16/10/2616/10/28

Fingerprint

random access memory
Error correction
Data storage equipment
thresholds
Threshold voltage
threshold voltage
electric batteries
Networks (circuits)

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering
  • Instrumentation

Cite this

Park, J., Jeong, H., Kim, H. J., & Jung, S. O. (2017). Low power SRAM bitcell design for near-Threshold operation. In 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016 [7804767] Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ICCE-Asia.2016.7804767
Park, Juhyun ; Jeong, Hanwool ; Kim, Hyun Jun ; Jung, Seong Ook. / Low power SRAM bitcell design for near-Threshold operation. 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016. Institute of Electrical and Electronics Engineers Inc., 2017.
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abstract = "Near-Threshold voltage (Vth) operating circuit is necessary for battery-operated devices. Especially, static random access memory (SRAM) design is important in near-Vth region because it is vulnerable to Vth variation. The conventional 6T SRAM bitcell design for super-Vth operation cannot be used for near-Vth operation because Vth variation in near-Vth region is more serious than that in super-Vth region. In addition, error correction code (ECC) is required to achieve high read stability and write ability yields. In this paper, bitcell yield according to ECC type in SRAM is analyzed and the efficient near-Vth bitcell design is determined with considering area overhead in 65nm technology.",
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Park, J, Jeong, H, Kim, HJ & Jung, SO 2017, Low power SRAM bitcell design for near-Threshold operation. in 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016., 7804767, Institute of Electrical and Electronics Engineers Inc., 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016, Seoul, Korea, Republic of, 16/10/26. https://doi.org/10.1109/ICCE-Asia.2016.7804767

Low power SRAM bitcell design for near-Threshold operation. / Park, Juhyun; Jeong, Hanwool; Kim, Hyun Jun; Jung, Seong Ook.

2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016. Institute of Electrical and Electronics Engineers Inc., 2017. 7804767.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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N2 - Near-Threshold voltage (Vth) operating circuit is necessary for battery-operated devices. Especially, static random access memory (SRAM) design is important in near-Vth region because it is vulnerable to Vth variation. The conventional 6T SRAM bitcell design for super-Vth operation cannot be used for near-Vth operation because Vth variation in near-Vth region is more serious than that in super-Vth region. In addition, error correction code (ECC) is required to achieve high read stability and write ability yields. In this paper, bitcell yield according to ECC type in SRAM is analyzed and the efficient near-Vth bitcell design is determined with considering area overhead in 65nm technology.

AB - Near-Threshold voltage (Vth) operating circuit is necessary for battery-operated devices. Especially, static random access memory (SRAM) design is important in near-Vth region because it is vulnerable to Vth variation. The conventional 6T SRAM bitcell design for super-Vth operation cannot be used for near-Vth operation because Vth variation in near-Vth region is more serious than that in super-Vth region. In addition, error correction code (ECC) is required to achieve high read stability and write ability yields. In this paper, bitcell yield according to ECC type in SRAM is analyzed and the efficient near-Vth bitcell design is determined with considering area overhead in 65nm technology.

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Park J, Jeong H, Kim HJ, Jung SO. Low power SRAM bitcell design for near-Threshold operation. In 2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016. Institute of Electrical and Electronics Engineers Inc. 2017. 7804767 https://doi.org/10.1109/ICCE-Asia.2016.7804767