Near-Threshold voltage (Vth) operating circuit is necessary for battery-operated devices. Especially, static random access memory (SRAM) design is important in near-Vth region because it is vulnerable to Vth variation. The conventional 6T SRAM bitcell design for super-Vth operation cannot be used for near-Vth operation because Vth variation in near-Vth region is more serious than that in super-Vth region. In addition, error correction code (ECC) is required to achieve high read stability and write ability yields. In this paper, bitcell yield according to ECC type in SRAM is analyzed and the efficient near-Vth bitcell design is determined with considering area overhead in 65nm technology.
|Title of host publication||2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Publication status||Published - 2017 Jan 3|
|Event||2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016 - Seoul, Korea, Republic of|
Duration: 2016 Oct 26 → 2016 Oct 28
|Name||2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016|
|Other||2016 IEEE International Conference on Consumer Electronics-Asia, ICCE-Asia 2016|
|Country||Korea, Republic of|
|Period||16/10/26 → 16/10/28|
Bibliographical notePublisher Copyright:
© 2016 IEEE.
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering