Low stress polyimide/silica nanocomposites as dielectrics for wafer level chip scale packaging

Kwangwon Seo, Ki Ho Nam, Sangrae Lee, Haksoo Han

Research output: Contribution to journalArticlepeer-review

4 Citations (Scopus)

Abstract

In recent times, with increase of requirements in function and appearance, it is important to improve the function of package components which are implemented in various electronic devices by developing reliable packaging technology such as wafer level chip scale packaging (WLCSP). For the package, insulation techniques are essential to reduce noise caused by high electrical current and overcome coefficient of thermal expansion (CTE) mismatch between interfaces of multi-layers. In this study, in order to investigate properties of polyimide based materials for WLCSP as dielectrics, a series of copolyimide/silica nanocomposite (CPS) films were prepared from sol-gel method and their residual stress behavior on Si wafer was evaluated in situ during thermal cure and cooling steps. This work provides a possible candidate for application in WLCSP industries by controlling desirable properties.

Original languageEnglish
Article number127204
JournalMaterials Letters
Volume263
DOIs
Publication statusPublished - 2020 Mar 15

Bibliographical note

Funding Information:
This research was supported by Basic Science Research Program National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF?2017R1D1A1B03033332).

Funding Information:
This research was supported by Basic Science Research Program National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF–2017R1D1A1B03033332). Appendix A

Publisher Copyright:
© 2019 Elsevier B.V.

All Science Journal Classification (ASJC) codes

  • Materials Science(all)
  • Condensed Matter Physics
  • Mechanics of Materials
  • Mechanical Engineering

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