Abstract
In this letter, we proposed solution-processed AlInZnO (AIZO)/InZnO (IZO) dual-channel thin-film transistors to realize both proper switching behavior and competitive device performance at the low annealing temperature of 350°C. A thin IZO layer provides a higher carrier concentration, thereby maximizing the charge accumulation and yielding high saturation mobility μsat, whereas a thick AIZO layer controls the charge conductance resulting in suitable threshold voltage Vth. We therefore obtain excellent device characteristics at 350 °C with μsat of 1.57 cm 2Vs, Vth of 1.28 V, an on/off ratio of ∼1.4 ×107, and a subthreshold gate swing of 0.59 V/dec.
Original language | English |
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Article number | 5957259 |
Pages (from-to) | 1242-1244 |
Number of pages | 3 |
Journal | IEEE Electron Device Letters |
Volume | 32 |
Issue number | 9 |
DOIs | |
Publication status | Published - 2011 Sep |
Bibliographical note
Funding Information:Manuscript received June 17, 2011; accepted June 20, 2011. Date of publication July 18, 2011; date of current version August 24, 2011. This work was supported in part by the National Research Foundation of Korea funded by the Korean Ministry of Education, Science and Technology under Grant 2007-0055837 and in part by Samsung Advanced Institute of Technology. The review of this letter was arranged by Editor A. Nathan.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering