Abstract
In this letter, we proposed solution-processed AlInZnO (AIZO)/InZnO (IZO) dual-channel thin-film transistors to realize both proper switching behavior and competitive device performance at the low annealing temperature of 350°C. A thin IZO layer provides a higher carrier concentration, thereby maximizing the charge accumulation and yielding high saturation mobility μsat, whereas a thick AIZO layer controls the charge conductance resulting in suitable threshold voltage Vth. We therefore obtain excellent device characteristics at 350 °C with μsat of 1.57 cm 2Vs, Vth of 1.28 V, an on/off ratio of ∼1.4 ×107, and a subthreshold gate swing of 0.59 V/dec.
Original language | English |
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Article number | 5957259 |
Pages (from-to) | 1242-1244 |
Number of pages | 3 |
Journal | IEEE Electron Device Letters |
Volume | 32 |
Issue number | 9 |
DOIs | |
Publication status | Published - 2011 Sep 1 |
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All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering
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Low-temperature solution processing of AlInZnO/InZnO dual-channel thin-film transistors. / Kim, Kyung Min; Jeong, Woong Hee; Kim, Dong Lim; Rim, You Seung; Choi, Yuri; Ryu, Myung Kwan; Park, Kyung Bae; Kim, Hyun Jae.
In: IEEE Electron Device Letters, Vol. 32, No. 9, 5957259, 01.09.2011, p. 1242-1244.Research output: Contribution to journal › Article
TY - JOUR
T1 - Low-temperature solution processing of AlInZnO/InZnO dual-channel thin-film transistors
AU - Kim, Kyung Min
AU - Jeong, Woong Hee
AU - Kim, Dong Lim
AU - Rim, You Seung
AU - Choi, Yuri
AU - Ryu, Myung Kwan
AU - Park, Kyung Bae
AU - Kim, Hyun Jae
PY - 2011/9/1
Y1 - 2011/9/1
N2 - In this letter, we proposed solution-processed AlInZnO (AIZO)/InZnO (IZO) dual-channel thin-film transistors to realize both proper switching behavior and competitive device performance at the low annealing temperature of 350°C. A thin IZO layer provides a higher carrier concentration, thereby maximizing the charge accumulation and yielding high saturation mobility μsat, whereas a thick AIZO layer controls the charge conductance resulting in suitable threshold voltage Vth. We therefore obtain excellent device characteristics at 350 °C with μsat of 1.57 cm 2Vs, Vth of 1.28 V, an on/off ratio of ∼1.4 ×107, and a subthreshold gate swing of 0.59 V/dec.
AB - In this letter, we proposed solution-processed AlInZnO (AIZO)/InZnO (IZO) dual-channel thin-film transistors to realize both proper switching behavior and competitive device performance at the low annealing temperature of 350°C. A thin IZO layer provides a higher carrier concentration, thereby maximizing the charge accumulation and yielding high saturation mobility μsat, whereas a thick AIZO layer controls the charge conductance resulting in suitable threshold voltage Vth. We therefore obtain excellent device characteristics at 350 °C with μsat of 1.57 cm 2Vs, Vth of 1.28 V, an on/off ratio of ∼1.4 ×107, and a subthreshold gate swing of 0.59 V/dec.
UR - http://www.scopus.com/inward/record.url?scp=80052021995&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=80052021995&partnerID=8YFLogxK
U2 - 10.1109/LED.2011.2160612
DO - 10.1109/LED.2011.2160612
M3 - Article
AN - SCOPUS:80052021995
VL - 32
SP - 1242
EP - 1244
JO - IEEE Electron Device Letters
JF - IEEE Electron Device Letters
SN - 0741-3106
IS - 9
M1 - 5957259
ER -