@inproceedings{426fb9114513458e9693379ccb0b8552,
title = "Mechanisms limiting EOT scaling and gate leakage currents of high-k/metal gate stacks directly on SiGe and a method to enable sub-1nm EOT",
abstract = "For the first time, we provide mechanistic understanding of high gate leakage current on surface channel SiGe pFET with high-k/metal gate to enable sub 1nm EOT. The primary mechanism limiting EOT scaling is Ge enhanced Si oxidation resulting in a thick (1.4nm) SiOx interface layer. A secondary mechanism, Ge doping (≥4%) in high-k, possibly by up diffusion, also results in higher leakage. With this understanding, we optimized high-k nitridation reducing O and Ge diffusion to achieve EOT=0.91nm directly on SiGe with leakage equivalent to bulk Si. High Ion (1.5x Si), and low subthreshold slope (73mV/dec) are also achieved. This mechanism enables high mobility channel gate dielectric development directly on SiGe without the need for Si cap, simplifying processing and device design.",
author = "J. Huang and Kirsch, {P. D.} and J. Oh and Lee, {S. H.} and J. Price and P. Majhi and Harris, {H. R.} and Gilmer, {D. C.} and Kelly, {D. Q.} and P. Sivasubramani and G. Bersuker and D. Heh and C. Young and Park, {C. S.} and Tan, {Y. N.} and N. Goel and C. Park and Hung, {P. Y.} and P. Lysaght and Choi, {K. J.} and Cho, {B. J.} and Tseng, {H. H.} and Lee, {B. H.} and R. Jammy",
note = "Copyright: Copyright 2008 Elsevier B.V., All rights reserved.; 2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT ; Conference date: 17-06-2008 Through 19-06-2008",
year = "2008",
doi = "10.1109/VLSIT.2008.4588571",
language = "English",
isbn = "9781424418053",
series = "Digest of Technical Papers - Symposium on VLSI Technology",
pages = "82--83",
booktitle = "2008 Symposium on VLSI Technology Digest of Technical Papers, VLSIT",
}