Nanotechnology is considered important as an alternative technology to overcome the limitations of CMOS technology. While nanotechnology has advantages in terms of power, density and performance, it is essential to obtain defect tolerance using reconfiguration due to its high defect rate. To bypass defect elements, accurate defect diagnosis is important for circuit configuration. CMOL FPGAs are circuit structures combining advantages of CMOS and nanotechnology. In this paper, an accurate defect diagnosis method for CMOL FPGAs using an operation similar to the read of CMOL memory are proposed.
|Title of host publication||Proceedings - International SoC Design Conference, ISOCC 2020|
|Publisher||Institute of Electrical and Electronics Engineers Inc.|
|Number of pages||2|
|Publication status||Published - 2020 Oct 21|
|Event||17th International System-on-Chip Design Conference, ISOCC 2020 - Yeosu, Korea, Republic of|
Duration: 2020 Oct 21 → 2020 Oct 24
|Name||Proceedings - International SoC Design Conference, ISOCC 2020|
|Conference||17th International System-on-Chip Design Conference, ISOCC 2020|
|Country/Territory||Korea, Republic of|
|Period||20/10/21 → 20/10/24|
Bibliographical noteFunding Information:
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (No. 2019R1A2C3011079).
© 2020 IEEE.
All Science Journal Classification (ASJC) codes
- Energy Engineering and Power Technology
- Electrical and Electronic Engineering
- Artificial Intelligence
- Hardware and Architecture