Memory sub-system optimization on a SIMD video signal processor for multi-standard CODEC

Jung Wook Park, Cheong Ghil Kim, Gi Ho Park, Shin-Dug Kim

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Video has become a key multimedia application in embedded systems and various standards have been developed for specific purposes. As a result, high performance and flexible functionality are required to design embedded systems for video CODEC. SIMD extension is well known as a representative approach to overcome performance bottlenecks of programmable processors, especially in the multimedia operations. This paper proposes a novel linear SIMD processing array with an intelligent local memory structure and its associated software optimization for video decoding. An entire evaluation, including component design, system integration, and cycle accurate simulation is accomplished by a system-level SoC design tool. Compared to conventional SIMD approaches, the proposed method can reduce the execution cycle by approximately 25%.

Original languageEnglish
Title of host publication2012 International Conference on Information Science and Applications, ICISA 2012
DOIs
Publication statusPublished - 2012 Jul 30
Event2012 International Conference on Information Science and Applications, ICISA 2012 - Suwon, Korea, Republic of
Duration: 2012 May 232012 May 25

Other

Other2012 International Conference on Information Science and Applications, ICISA 2012
CountryKorea, Republic of
CitySuwon
Period12/5/2312/5/25

Fingerprint

Data storage equipment
Embedded systems
Array processing
Decoding
System-on-chip

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Information Systems

Cite this

Park, J. W., Kim, C. G., Park, G. H., & Kim, S-D. (2012). Memory sub-system optimization on a SIMD video signal processor for multi-standard CODEC. In 2012 International Conference on Information Science and Applications, ICISA 2012 [6220960] https://doi.org/10.1109/ICISA.2012.6220960
Park, Jung Wook ; Kim, Cheong Ghil ; Park, Gi Ho ; Kim, Shin-Dug. / Memory sub-system optimization on a SIMD video signal processor for multi-standard CODEC. 2012 International Conference on Information Science and Applications, ICISA 2012. 2012.
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Park, JW, Kim, CG, Park, GH & Kim, S-D 2012, Memory sub-system optimization on a SIMD video signal processor for multi-standard CODEC. in 2012 International Conference on Information Science and Applications, ICISA 2012., 6220960, 2012 International Conference on Information Science and Applications, ICISA 2012, Suwon, Korea, Republic of, 12/5/23. https://doi.org/10.1109/ICISA.2012.6220960

Memory sub-system optimization on a SIMD video signal processor for multi-standard CODEC. / Park, Jung Wook; Kim, Cheong Ghil; Park, Gi Ho; Kim, Shin-Dug.

2012 International Conference on Information Science and Applications, ICISA 2012. 2012. 6220960.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

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Park JW, Kim CG, Park GH, Kim S-D. Memory sub-system optimization on a SIMD video signal processor for multi-standard CODEC. In 2012 International Conference on Information Science and Applications, ICISA 2012. 2012. 6220960 https://doi.org/10.1109/ICISA.2012.6220960