Microcrystalline silicone (μ-Si:H) TFTs were fabricated using a conventional bottom gate amorphous Si (a-Si:H) process. A unique μc-Si:H deposition technique and TFT architecture was proposed to enhance the reliability of the TFTs. This three-mask TFT fabrication process is comparable with existing a-Si:H TFT process. In order to suppress nucleation at the bottom interface, a N2 plasma passivation was conducted before the deposition of the μc-Si:H. A typical transfer characteristic of the TFTs shows a low off-current with a value of less than 1 pA and a sub-threshold slope of 0.7 V/dec. DC bias stress was applied to verify the use of pc-Si:H TFTs for AMOLED displays. After 10,000 s of stress application time, the off-current was even lowered and subthreshold slope variation was less than 5%. For AMOLED displays, OLED pixel simulation was performed. A pixel current of 13 pA was achieved with a Vdata of 10 V. After the simulation, a linear equation for the pixel current was derived. We also present the simulation tests of simple logical electronics. At last, for Active matrix Display back-plane, a row driver with no shift compensation is simulated with good results in terms of reproducibility and reliability.
|Number of pages||4|
|Journal||Digest of Technical Papers - SID International Symposium|
|Publication status||Published - 2006|
|Event||44th International Symposium, Seminar, and Exhibition, SID 2006 - San Francisco, CA, United States|
Duration: 2006 Jun 4 → 2006 Jun 9
All Science Journal Classification (ASJC) codes