Modular 128-Channel Δ - ΔΣ Analog Front-End Architecture Using Spectrum Equalization Scheme for 1024-Channel 3-D Neural Recording Microsystems

Sung Yun Park, Jihyun Cho, Kyounghwan Na, Euisik Yoon

Research output: Contribution to journalArticlepeer-review

21 Citations (Scopus)

Abstract

We report an area- and energy-efficient integrated circuit architecture of a 128-channel Δ-modulated ΔΣ analog front-end (Δ - ΔΣ AFE) for 1024-channel 3-D massive-parallel neural recording microsystems. Our platform has adopted a modularity of 128 channels and consists of eight multi-shank neural probes connected to individual AFEs through interposers in a small form factor. In order to reduce both area and energy consumption in the recording circuits, we implemented a spectrum equalization scheme to take advantage of the inherent spectral characteristics of neural signals, where most of the energy is confined in low frequencies and follows a ∼1/f curve in the spectrum. This allows us to implement the AFE with a relaxed dynamic range by ∼30 dB, thereby contributing to the significant reduction of both energy and area without sacrificing signal integrity. The Δ - ΔΣ AFE was fabricated using 0.18- μm CMOS processes. The single-channel AFE consumes 3.05 μW from 0.5 and 1.0 V supplies in an area of 0.05 mm2 with 63.8-dB signal-to-noise-and-distortion ratio, 3.02 noise efficiency factor (NEF), and 4.56 NEF2VDD. We also have achieved an energy-area product, a figure-of-merit most critical for massive-parallel neural recording systems, of 6.34 fJ/C·s·mm2.

Original languageEnglish
Article number8100720
Pages (from-to)501-514
Number of pages14
JournalIEEE Journal of Solid-State Circuits
Volume53
Issue number2
DOIs
Publication statusPublished - 2018 Feb

Bibliographical note

Funding Information:
Manuscript received April 17, 2017; revised July 7, 2017 and August 25, 2017; accepted October 6, 2017. Date of publication November 8, 2017; date of current version January 25, 2018. This paper was approved by Associate Editor Azita Emami. This work was supported in part by NSF ECCS under Grant 1102067 and in part by NSF under Grant 1545858. (Corresponding author: Euisik Yoon.) S.-Y. Park, K. Na, and E. Yoon are with the Center for Wireless Integrated MicroSensing and Systems, Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, M I48109 USA (e-mail: sungyun@umich.edu; khna@umich.edu; esyoon@umich.edu).

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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