MTR-fill: A simulated annealing-based X-filling technique to reduce test power dissipation for scan-based designs

Dong Sup Song, Jin Ho Ahn, Tae Jin Kim, Sungho Kang

Research output: Contribution to journalArticle

6 Citations (Scopus)

Abstract

This paper proposes the minimum transition random Xfilling (MTR-fill) technique, which is a new X-filling method, to reduce the amount of power dissipation during scan-based testing. In order to model the amount of power dissipated during scan load/unload cycles, the total weighted transition metric (TWTM) is introduced, which is calculated by the sum of the weighted transitions in a scan-load of a test pattern and a scan-unload of a test response. The proposed MTR-fill is implemented by simulated annealing method. During the annealing process, the TWTM of a pair of test patterns and test responses are minimized. Simultaneously, the MTR-fill attempts to increase the randomness of test patterns in order to reduce the number of test patterns needed to achieve adequate fault coverage. The effectiveness of the proposed technique is shown through experiments for ISCAS'89 benchmark circuits.

Original languageEnglish
Pages (from-to)1197-1200
Number of pages4
JournalIEICE Transactions on Information and Systems
VolumeE91-D
Issue number4
DOIs
Publication statusPublished - 2008 Jan 1

Fingerprint

Simulated annealing
Energy dissipation
Annealing
Networks (circuits)
Testing
Experiments

All Science Journal Classification (ASJC) codes

  • Software
  • Hardware and Architecture
  • Computer Vision and Pattern Recognition
  • Electrical and Electronic Engineering
  • Artificial Intelligence

Cite this

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abstract = "This paper proposes the minimum transition random Xfilling (MTR-fill) technique, which is a new X-filling method, to reduce the amount of power dissipation during scan-based testing. In order to model the amount of power dissipated during scan load/unload cycles, the total weighted transition metric (TWTM) is introduced, which is calculated by the sum of the weighted transitions in a scan-load of a test pattern and a scan-unload of a test response. The proposed MTR-fill is implemented by simulated annealing method. During the annealing process, the TWTM of a pair of test patterns and test responses are minimized. Simultaneously, the MTR-fill attempts to increase the randomness of test patterns in order to reduce the number of test patterns needed to achieve adequate fault coverage. The effectiveness of the proposed technique is shown through experiments for ISCAS'89 benchmark circuits.",
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MTR-fill : A simulated annealing-based X-filling technique to reduce test power dissipation for scan-based designs. / Song, Dong Sup; Ahn, Jin Ho; Kim, Tae Jin; Kang, Sungho.

In: IEICE Transactions on Information and Systems, Vol. E91-D, No. 4, 01.01.2008, p. 1197-1200.

Research output: Contribution to journalArticle

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