Multi-layer MoS₂ FET with small hysteresis by using atomic layer deposition Al₂O₃ as gate insulator

Two-dimensional materials like graphene have great potential to excess the mobility limit of conventional silicon devices. Particularly, MoS₂ FETs have high mobility and low off-current simultaneously due to their sizable band-gap. However, large hysteresis in its transfer curve is an obstacle for implementation to logic circuits and switching devices. Here, we report on a multi-layer MoS₂ FET using atomic layer deposition Al₂O₃ as a gate insulator, showing small hysteresis of 0.86 V. It is thought that, such improvement in the hysteresis attributes to the small trap at the MoS₂/Al₂O₃ interface, and it is confirmed through a constant current stress test.