Two-dimensional materials like graphene have great potential to excess the mobility limit of conventional silicon devices. Particularly, MoS2 FETs have high mobility and low off-current simultaneously due to their sizable band-gap. However, large hysteresis in its transfer curve is an obstacle for implementation to logic circuits and switching devices. Here, we report on a multi-layer MoS2 FET using atomic layer deposition Al2O3 as a gate insulator, showing small hysteresis of 0.86 V. It is thought that, such improvement in the hysteresis attributes to the small trap at the MoS2/Al2O3 interface, and it is confirmed through a constant current stress test.
|Journal||ECS Solid State Letters|
|Publication status||Published - 2014 Jan 1|
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering