A monolithic ternary logic transistor based on a vertically stacked double n-type semiconductor heterostructure is presented. Incorporation of the organic heterostructure into the conventional metal-oxide-semiconductor field-effect transistor (MOSFET) architecture induces the generation of stable multiple logic states in the device; these states can be further optimized to be equiprobable and distinctive, which are the most desirable and requisite properties for multivalued logic devices. A systematic investigation reveals that the electrical properties of the device are governed by not only the conventional field-effect charge transport but also the field-effect charge tunneling at the heterointerfaces, and thus, an intermediate state can be finely tuned by independently controlling the transition between the onsets of these two mechanisms. The achieved device performance agrees with the results of a numerical simulation based on a pseudo-metal–insulator–metal model; the obtained findings therefore provide rational criteria for material selection in a simple energetic perspective. The operation of various ternary logic circuits based on the optimized multistate heterojunction transistors, including the NMIN and NMAX gates, is also demonstrated.
Bibliographical noteFunding Information:
D.U.L. and S.B.J. contributed equally to this work. This work was supported by the National Research Foundation of Korea (NRF) grant, funded by the Korean Government (MSIT) (2020R1A4A2002806 and 2020R1C1C1009381) and the Creative Materials Discovery Program (2019M3D1A1078299) through the NRF of Korea funded by the Ministry of Science and ICT, Korea. This research was partially supported by the Yonsei University Research Fund of 2021.
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All Science Journal Classification (ASJC) codes
- Materials Science(all)
- Mechanics of Materials
- Mechanical Engineering