Multibank Optimized Redundancy Analysis Using Efficient Fault Collection

Hogyeong Kim, Hayoung Lee, Donghyun Han, Sungho Kang

Research output: Contribution to journalArticlepeer-review

1 Citation (Scopus)


With technological advancements, the density and capacity of memory are rapidly increasing. As the number of memory cells increases, the difficulty of fault analysis and the number of faults also increase. Hence, the yield and test cost of memory have become essential issues in memory manufacturing. Many manufacturers have used redundancy analysis (RA) to improve the memory yield and decrease the test cost. However, most conventional RA methods require a lengthy analysis time to find a repair solution, and it is difficult to obtain an optimal repair rate with conventional RA algorithms. Although several algorithms using various spare structures to achieve performance improvement have been proposed, those improvements have not been ground breaking. In this article, a new multibank optimized RA (MORA) algorithm is proposed. It achieves a very high repair rate and a drastic reduction in the analysis time compared with conventional RA algorithms using various spare structures. During testing, the proposed algorithm stores the faulty cell information efficiently. Therefore, the analysis time can be shortened through the presolution process of the repair analysis using the proposed fault storage spaces. Additionally, the proposed spare structures are used to increase the repair rate. The experimental results reveal that the proposed algorithm can achieve a very high repair rate at a faster speed than conventional RA algorithms.

Original languageEnglish
Pages (from-to)2739-2752
Number of pages14
JournalIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Issue number8
Publication statusPublished - 2022 Aug 1

Bibliographical note

Funding Information:
This work was supported by the National Research Foundation of Korea (NRF) grant funded by the Korea government (MSIT) (No. 2019R1A2C3011079).

Publisher Copyright:
© 1982-2012 IEEE.

All Science Journal Classification (ASJC) codes

  • Software
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering


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