Multilayer power delivery network design for high-speed microprocessor system

Seong Geun Park, Ji Seong Kim, Jong Gwan Yook, Han Kyu Park

Research output: Contribution to journalConference article

5 Citations (Scopus)

Abstract

In this paper, an efficient modeling method for arbitrary shaped multi-layer power distribution network is proposed based on the method of transmission line grid model. In addition, a pre-layout design approach for the high-speed microprocessor is proposed. For arbitrary-shaped multi-layer PCB stack up configuration as well as selection and placement of decoupling capacitors, an effective solution for reducing SSN and EMI is obtained by modeling and simulation of complete power distribution system.

Original languageEnglish
Pages (from-to)1613-1618
Number of pages6
JournalProceedings - Electronic Components and Technology Conference
Publication statusPublished - 2003 Jul 17
Event53rd Electronic Components and Technology Conference 2003 - New Orleans LA, United States
Duration: 2003 May 272003 May 30

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All Science Journal Classification (ASJC) codes

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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