Multiwafer vertical interconnects for three-dimensional integrated circuits

Rosa R. Lahiji; Katherine J. Herrick; Yongshik Lee; Alexandros Margomenos; Saeed Mohammadi; Linda P.B. Katehi

doi:10.1109/TMTT.2006.874867

Multiwafer vertical interconnects for three-dimensional integrated circuits

Rosa R. Lahiji, Katherine J. Herrick, Yongshik Lee, Alexandros Margomenos, Saeed Mohammadi, Linda P.B. Katehi

Department of Electrical and Electronic Engineering

Research output: Contribution to journal › Article › peer-review

9 Citations (Scopus)

Abstract

Low-loss multiwafer vertical interconnects appropriate for a microstrip-based circuit architecture are proposed. These transitions have been designed, fabricated, and measured for 100-μm-thick silicon and GaAs substrates separately. Experimental results show excellent performance up to 20 GHz, with extremely low insertion loss (better than 0.12 and 0.38 dB for the two different silicon designs and 0.2 dB for the GaAs transition), and very good return loss (reflection of better than 12.9 and 17.3 dB for the two silicon designs, respectively, and 13.6 dB for the GaAs design). Using a high-performance transition allows for a more power-efficient interconnect, while it enables denser packaging by stacking the substrates on top of each other, as today's technologies demand.

Original language	English
Pages (from-to)	2699-2705
Number of pages	7
Journal	IEEE Transactions on Microwave Theory and Techniques
Volume	54
Issue number	6
DOIs	https://doi.org/10.1109/TMTT.2006.874867
Publication status	Published - 2006 Jun

Bibliographical note

Funding Information:
Manuscript received October 12, 2005; revised February 4, 2006. This work was supported by the Defense Advanced Research Project Agency and managed by the Air Force Research Laboratory, Sensors Directorate, Aerospace Components and Subsystems Division, Wright Patterson AFB under the Intelligent RF-Front End Program. R. R. Lahiji, S. Mohammadi, and L. P. B. Katehi are with the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47906 USA (e-mail: rrlahiji@purdue.edu). K. J. Herrick is with Raytheon RF Components, Andover, MA 01810 USA. Y. Lee is with the School of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, Korea. A. Margomenos is with EMAG Technologies Inc., Ann Arbor, MI 48108 USA. Digital Object Identifier 10.1109/TMTT.2006.874867

All Science Journal Classification (ASJC) codes

Radiation
Condensed Matter Physics
Electrical and Electronic Engineering

Access to Document

10.1109/TMTT.2006.874867

Cite this

@article{84d802071f7842dfb0ddcc055e36bf66,

title = "Multiwafer vertical interconnects for three-dimensional integrated circuits",

abstract = "Low-loss multiwafer vertical interconnects appropriate for a microstrip-based circuit architecture are proposed. These transitions have been designed, fabricated, and measured for 100-μm-thick silicon and GaAs substrates separately. Experimental results show excellent performance up to 20 GHz, with extremely low insertion loss (better than 0.12 and 0.38 dB for the two different silicon designs and 0.2 dB for the GaAs transition), and very good return loss (reflection of better than 12.9 and 17.3 dB for the two silicon designs, respectively, and 13.6 dB for the GaAs design). Using a high-performance transition allows for a more power-efficient interconnect, while it enables denser packaging by stacking the substrates on top of each other, as today's technologies demand.",

author = "Lahiji, {Rosa R.} and Herrick, {Katherine J.} and Yongshik Lee and Alexandros Margomenos and Saeed Mohammadi and Katehi, {Linda P.B.}",

note = "Funding Information: Manuscript received October 12, 2005; revised February 4, 2006. This work was supported by the Defense Advanced Research Project Agency and managed by the Air Force Research Laboratory, Sensors Directorate, Aerospace Components and Subsystems Division, Wright Patterson AFB under the Intelligent RF-Front End Program. R. R. Lahiji, S. Mohammadi, and L. P. B. Katehi are with the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47906 USA (e-mail: rrlahiji@purdue.edu). K. J. Herrick is with Raytheon RF Components, Andover, MA 01810 USA. Y. Lee is with the School of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, Korea. A. Margomenos is with EMAG Technologies Inc., Ann Arbor, MI 48108 USA. Digital Object Identifier 10.1109/TMTT.2006.874867",

year = "2006",

month = jun,

doi = "10.1109/TMTT.2006.874867",

language = "English",

volume = "54",

pages = "2699--2705",

journal = "IRE Transactions on Microwave Theory and Techniques",

issn = "0018-9480",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

number = "6",

}

TY - JOUR

T1 - Multiwafer vertical interconnects for three-dimensional integrated circuits

AU - Lahiji, Rosa R.

AU - Herrick, Katherine J.

AU - Lee, Yongshik

AU - Margomenos, Alexandros

AU - Mohammadi, Saeed

AU - Katehi, Linda P.B.

N1 - Funding Information: Manuscript received October 12, 2005; revised February 4, 2006. This work was supported by the Defense Advanced Research Project Agency and managed by the Air Force Research Laboratory, Sensors Directorate, Aerospace Components and Subsystems Division, Wright Patterson AFB under the Intelligent RF-Front End Program. R. R. Lahiji, S. Mohammadi, and L. P. B. Katehi are with the School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47906 USA (e-mail: rrlahiji@purdue.edu). K. J. Herrick is with Raytheon RF Components, Andover, MA 01810 USA. Y. Lee is with the School of Electrical and Electronic Engineering, Yonsei University, Seoul 120-749, Korea. A. Margomenos is with EMAG Technologies Inc., Ann Arbor, MI 48108 USA. Digital Object Identifier 10.1109/TMTT.2006.874867

PY - 2006/6

Y1 - 2006/6

N2 - Low-loss multiwafer vertical interconnects appropriate for a microstrip-based circuit architecture are proposed. These transitions have been designed, fabricated, and measured for 100-μm-thick silicon and GaAs substrates separately. Experimental results show excellent performance up to 20 GHz, with extremely low insertion loss (better than 0.12 and 0.38 dB for the two different silicon designs and 0.2 dB for the GaAs transition), and very good return loss (reflection of better than 12.9 and 17.3 dB for the two silicon designs, respectively, and 13.6 dB for the GaAs design). Using a high-performance transition allows for a more power-efficient interconnect, while it enables denser packaging by stacking the substrates on top of each other, as today's technologies demand.

AB - Low-loss multiwafer vertical interconnects appropriate for a microstrip-based circuit architecture are proposed. These transitions have been designed, fabricated, and measured for 100-μm-thick silicon and GaAs substrates separately. Experimental results show excellent performance up to 20 GHz, with extremely low insertion loss (better than 0.12 and 0.38 dB for the two different silicon designs and 0.2 dB for the GaAs transition), and very good return loss (reflection of better than 12.9 and 17.3 dB for the two silicon designs, respectively, and 13.6 dB for the GaAs design). Using a high-performance transition allows for a more power-efficient interconnect, while it enables denser packaging by stacking the substrates on top of each other, as today's technologies demand.

UR - http://www.scopus.com/inward/record.url?scp=33947402291&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=33947402291&partnerID=8YFLogxK

U2 - 10.1109/TMTT.2006.874867

DO - 10.1109/TMTT.2006.874867

M3 - Article

AN - SCOPUS:33947402291

SN - 0018-9480

VL - 54

SP - 2699

EP - 2705

JO - IRE Transactions on Microwave Theory and Techniques

JF - IRE Transactions on Microwave Theory and Techniques

IS - 6

ER -

Multiwafer vertical interconnects for three-dimensional integrated circuits

Abstract

Bibliographical note

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this